diff --git a/boards/phytec/mimx8mp_phyboard_pollux/doc/index.rst b/boards/phytec/mimx8mp_phyboard_pollux/doc/index.rst
index 46112485d6e..30a36cf8d13 100644
--- a/boards/phytec/mimx8mp_phyboard_pollux/doc/index.rst
+++ b/boards/phytec/mimx8mp_phyboard_pollux/doc/index.rst
@@ -56,23 +56,23 @@ Supported Features
 The Zephyr mimx8mp_phyboard_polis board configuration supports the following hardware
 features:
 
-+-----------+------------+-------------------------------------+
-| Interface | Controller | Driver/Component                    |
-+===========+============+=====================================+
-| NVIC      | on-chip    | nested vector interrupt controller  |
-+-----------+------------+-------------------------------------+
-| SYSTICK   | on-chip    | systick                             |
-+-----------+------------+-------------------------------------+
-| CLOCK     | on-chip    | clock_control                       |
-+-----------+------------+-------------------------------------+
-| PINMUX    | on-chip    | pinmux                              |
-+-----------+------------+-------------------------------------+
-| UART      | on-chip    | serial port-polling;                |
-|           |            | serial port-interrupt               |
-+-----------+------------+-------------------------------------+
-| GPIO      | on-chip    | GPIO output                         |
-|           |            | GPIO input                          |
-+-----------+------------+-------------------------------------+
++-----------+------------+------------------------------------+
+| Interface | Controller | Driver/Component                   |
++===========+============+====================================+
+| NVIC      | on-chip    | nested vector interrupt controller |
++-----------+------------+------------------------------------+
+| SYSTICK   | on-chip    | systick                            |
++-----------+------------+------------------------------------+
+| CLOCK     | on-chip    | clock_control                      |
++-----------+------------+------------------------------------+
+| PINMUX    | on-chip    | pinmux                             |
++-----------+------------+------------------------------------+
+| UART      | on-chip    | serial port-polling;               |
+|           |            | serial port-interrupt              |
++-----------+------------+------------------------------------+
+| GPIO      | on-chip    | GPIO output                        |
+|           |            | GPIO input                         |
++-----------+------------+------------------------------------+
 
 The default configuration can be found in the defconfig file:
 :zephyr_file:`boards/phytec/mimx8mp_phyboard_pollux/mimx8mp_phyboard_pollux_mimx8ml8_m7_defconfig`.
@@ -91,15 +91,15 @@ The following Compontens are tested and working correctly.
 UART
 ----
 
-+---------------+-----------------+-----------------------------------+
-| Board Name    | SoM Name        | Usage                             |
-+===============+=================+===================================+
-| Debug USB(A53)| UART1           | UART Debug Console via USB        |
-+---------------+-----------------+-----------------------------------+
-| Wo WiFi Module| UART3           | UART to WiFi/BLE Module           |
-+---------------+-----------------+-----------------------------------+
-| Debug USB(M4) | UART4           | UART Debug Console via USB        |
-+---------------+-----------------+-----------------------------------+
++-----------------+----------+----------------------------+
+| Board Name      | SoM Name | Usage                      |
++=================+==========+============================+
+| Debug USB (A53) | UART1    | UART Debug Console via USB |
++-----------------+----------+----------------------------+
+| Wo WiFi Module  | UART3    | UART to WiFi/BLE Module    |
++-----------------+----------+----------------------------+
+| Debug USB (M7)  | UART4    | UART Debug Console via USB |
++-----------------+----------+----------------------------+
 
 .. note::
   Please note, that the, to UART3 connected, Wifi/BLE Module isn't working with
@@ -130,19 +130,19 @@ enable remoteproc support.
 The M7 can use up to 3 different RAMs (currently, only two configurations are
 supported: ITCM and DDR). These are the memory mapping for A53 and M7:
 
-+------------+-------------------------+------------------------+-----------------------+----------------------+
-| Region     | Cortex-A53              | Cortex-M7 (System Bus) | Cortex-M7 (Code Bus)  | Size                 |
-+============+=========================+========================+=======================+======================+
-| OCRAM      | 0x00900000-0x0098FFFF   | 0x20200000-0x2028FFFF  | 0x00900000-0x0098FFFF | 576KB                |
-+------------+-------------------------+------------------------+-----------------------+----------------------+
-| DTCM       | 0x00800000-0x0081FFFF   | 0x20000000-0x2001FFFF  |                       | 128KB                |
-+------------+-------------------------+------------------------+-----------------------+----------------------+
-| ITCM       | 0x007E0000-0x007FFFFF   |                        | 0x00000000-0x0001FFFF | 128KB                |
-+------------+-------------------------+------------------------+-----------------------+----------------------+
-| OCRAM_S    | 0x00180000-0x00188FFF   | 0x20180000-0x20188FFF  | 0x00180000-0x00188FFF | 36KB                 |
-+------------+-------------------------+------------------------+-----------------------+----------------------+
-| DDR        | 0x80000000-0x803FFFFF   | 0x80200000-0x803FFFFF  | 0x80000000-0x801FFFFF | 2MB                  |
-+------------+-------------------------+------------------------+-----------------------+----------------------+
++---------+-----------------------+------------------------+-----------------------+-------+
+| Region  | Cortex-A53            | Cortex-M7 (System Bus) | Cortex-M7 (Code Bus)  | Size  |
++=========+=======================+========================+=======================+=======+
+| OCRAM   | 0x00900000-0x0098FFFF | 0x20200000-0x2028FFFF  | 0x00900000-0x0098FFFF | 576KB |
++---------+-----------------------+------------------------+-----------------------+-------+
+| DTCM    | 0x00800000-0x0081FFFF | 0x20000000-0x2001FFFF  |                       | 128KB |
++---------+-----------------------+------------------------+-----------------------+-------+
+| ITCM    | 0x007E0000-0x007FFFFF |                        | 0x00000000-0x0001FFFF | 128KB |
++---------+-----------------------+------------------------+-----------------------+-------+
+| OCRAM_S | 0x00180000-0x00188FFF | 0x20180000-0x20188FFF  | 0x00180000-0x00188FFF | 36KB  |
++---------+-----------------------+------------------------+-----------------------+-------+
+| DDR     | 0x80000000-0x803FFFFF | 0x80200000-0x803FFFFF  | 0x80000000-0x801FFFFF | 2MB   |
++---------+-----------------------+------------------------+-----------------------+-------+
 
 For more information about memory mapping see the
 `i.MX 8M Plus Applications Processor Reference Manual`_  (section 2.1 to 2.3)