diff --git a/boards/arm/nucleo_h723zg/Kconfig.board b/boards/arm/nucleo_h723zg/Kconfig.board new file mode 100644 index 00000000000..da658f90c6d --- /dev/null +++ b/boards/arm/nucleo_h723zg/Kconfig.board @@ -0,0 +1,8 @@ +# STM32H723ZG Nucleo board configuration + +# Copyright (c) 2020 Alexander Kozhinov +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_NUCLEO_H723ZG + bool "NUCLEO-H723ZG Development Board" + depends on SOC_STM32H723XX diff --git a/boards/arm/nucleo_h723zg/Kconfig.defconfig b/boards/arm/nucleo_h723zg/Kconfig.defconfig new file mode 100644 index 00000000000..7b5c327e97d --- /dev/null +++ b/boards/arm/nucleo_h723zg/Kconfig.defconfig @@ -0,0 +1,18 @@ +# STM32H723ZG Nucleo board configuration + +# Copyright (c) 2020 Alexander Kozhinov +# SPDX-License-Identifier: Apache-2.0 + +if BOARD_NUCLEO_H723ZG + +config BOARD + default "nucleo_h723zg" + +if NETWORKING + +config NET_L2_ETHERNET + default y + +endif # NETWORKING + +endif # BOARD_NUCLEO_H723ZG diff --git a/boards/arm/nucleo_h723zg/arduino_r3_connector.dtsi b/boards/arm/nucleo_h723zg/arduino_r3_connector.dtsi new file mode 100644 index 00000000000..172fadfabee --- /dev/null +++ b/boards/arm/nucleo_h723zg/arduino_r3_connector.dtsi @@ -0,0 +1,39 @@ +/* + * Copyright (c) 2020 Alexander Kozhinov + * SPDX-License-Identifier: Apache-2.0 + */ + +/ { + arduino_header: connector { + compatible = "arduino-header-r3"; + #gpio-cells = <2>; + gpio-map-mask = <0xffffffff 0xffffffc0>; + gpio-map-pass-thru = <0 0x3f>; + gpio-map = <0 0 &gpioa 3 0>, /* A0 */ + <1 0 &gpioc 0 0>, /* A1 */ + <2 0 &gpioc 3 0>, /* A2 */ + <3 0 &gpiob 1 0>, /* A3 */ + <4 0 &gpioc 2 0>, /* A4 */ + <5 0 &gpiof 10 0>, /* A5 */ + <6 0 &gpiob 7 0>, /* D0 */ + <7 0 &gpiob 6 0>, /* D1 */ + <8 0 &gpiog 14 0>, /* D2 */ + <9 0 &gpioe 13 0>, /* D3 */ + <10 0 &gpioe 14 0>, /* D4 */ + <11 0 &gpioe 11 0>, /* D5 */ + <12 0 &gpioe 9 0>, /* D6 */ + <13 0 &gpiog 12 0>, /* D7 */ + <14 0 &gpiof 3 0>, /* D8 */ + <15 0 &gpiod 15 0>, /* D9 */ + <16 0 &gpiod 14 0>, /* D10 */ + <17 0 &gpiob 5 0>, /* D11 */ + <18 0 &gpioa 6 0>, /* D12 */ + <19 0 &gpioa 5 0>, /* D13 */ + <20 0 &gpiob 9 0>, /* D14 */ + <21 0 &gpiob 8 0>; /* D15 */ + }; +}; + +arduino_i2c: &i2c1 {}; + +arduino_serial: &uart8 {}; diff --git a/boards/arm/nucleo_h723zg/board.cmake b/boards/arm/nucleo_h723zg/board.cmake new file mode 100644 index 00000000000..985cfd32ef7 --- /dev/null +++ b/boards/arm/nucleo_h723zg/board.cmake @@ -0,0 +1,9 @@ +# SPDX-License-Identifier: Apache-2.0 + +board_runner_args(openocd "--use-elf") +board_runner_args(jlink "--device=STM32H723ZG" "--speed=4000") +board_runner_args(stm32cubeprogrammer "--port=swd" "--reset=hw") + +include(${ZEPHYR_BASE}/boards/common/stm32cubeprogrammer.board.cmake) +include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake) +include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake) diff --git a/boards/arm/nucleo_h723zg/doc/img/nucleo_h723zg.jpg b/boards/arm/nucleo_h723zg/doc/img/nucleo_h723zg.jpg new file mode 100644 index 00000000000..ae9b6ba7300 Binary files /dev/null and b/boards/arm/nucleo_h723zg/doc/img/nucleo_h723zg.jpg differ diff --git a/boards/arm/nucleo_h723zg/doc/index.rst b/boards/arm/nucleo_h723zg/doc/index.rst new file mode 100644 index 00000000000..8770037c9aa --- /dev/null +++ b/boards/arm/nucleo_h723zg/doc/index.rst @@ -0,0 +1,239 @@ +.. _nucleo_h723zg_board: + +ST Nucleo H723ZG +################ + +Overview +******** + +The STM32 Nucleo-144 board provides an affordable and flexible way for users +to try out new concepts and build prototypes by choosing from the various combinations +of performance and power consumption features, provided by the STM32 microcontroller. +For the compatible boards, the internal or external SMPS significantly reduces power +consumption in Run mode. + +The ST Zio connector, which extends the ARDUINO® Uno V3 connectivity, and +the ST morpho headers provide an easy means of expanding the functionality of the Nucleo +open development platform with a wide choice of specialized shields. +The STM32 Nucleo-144 board does not require any separate probe as it integrates +the ST-LINK V3 debugger/programmer. + +The STM32 Nucleo-144 board comes with the STM32 comprehensive free software +libraries and examples available with the STM32Cube MCU Package. + +Key Features + +- STM32 microcontroller in LQFP144 package +- Ethernet compliant with IEEE-802.3-2002 (depending on STM32 support) +- USB OTG or full-speed device (depending on STM32 support) +- 3 user LEDs +- 2 user and reset push-buttons +- 32.768 kHz crystal oscillator +- Board connectors: + + - USB with Micro-AB + - Ethernet RJ45 (depending on STM32 support) + - SWDST Zio connector including Arduino* Uno V3ST + - ST morpho expansion + +- Flexible power-supply options: ST-LINK USB VBUS or external sources +- External or internal SMPS to generate Vcore logic supply +- On-board ST-LINK/V3 debugger/programmer with USB re-enumeration +- capability: mass storage, virtual COM port and debug port +- USB OTG full speed or device only + +.. image:: img/nucleo_h723zg.jpg + :width: 720px + :align: center + :height: 560px + :alt: Nucleo H723ZG + +More information about the board can be found at the `Nucleo H723ZG website`_. + +Hardware +******** + +Nucleo H723ZG provides the following hardware components: + +- STM32H723ZG in LQFP144 package +- ARM 32-bit Cortex-M7 CPU with FPU +- Chrom-ART Accelerator +- Hardware JPEG Codec +- 550 MHz max CPU frequency +- VDD from 1.62 V to 3.6 V +- 1 MB Flash +- 562 kB SRAM max (376 kb used currently) +- High-resolution timer (2.1 ns) +- 32-bit timers(2) +- 16-bit timers(12) +- SPI(6) +- I2C(4) +- I2S (3) +- USART(4) +- UART(4) +- USB OTG Full Speed and High Speed(1) +- USB OTG Full Speed(1) +- CAN-FD(2) +- SAI(2) +- SPDIF_Rx(4) +- HDMI_CEC(1) +- Dual Mode Quad SPI(1) +- Camera Interface +- GPIO (up to 114) with external interrupt capability +- 16-bit ADC(3) with 36 channels / 3.6 MSPS +- 12-bit DAC with 2 channels(2) +- True Random Number Generator (RNG) +- 16-channel DMA +- LCD-TFT Controller with XGA resolution + +Supported Features +================== + +The Zephyr nucleo_h723zg board configuration supports the following hardware +features: + ++-----------+------------+-------------------------------------+ +| Interface | Controller | Driver/Component | ++===========+============+=====================================+ +| NVIC | on-chip | nested vector interrupt controller | ++-----------+------------+-------------------------------------+ +| UART | on-chip | serial port | ++-----------+------------+-------------------------------------+ +| PINMUX | on-chip | pinmux | ++-----------+------------+-------------------------------------+ +| GPIO | on-chip | gpio | ++-----------+------------+-------------------------------------+ +| RTC | on-chip | counter | ++-----------+------------+-------------------------------------+ +| I2C | on-chip | i2c | ++-----------+------------+-------------------------------------+ +| PWM | on-chip | pwm | ++-----------+------------+-------------------------------------+ +| ETHERNET | on-chip | ethernet | ++-----------+------------+-------------------------------------+ +| RNG | on-chip | True Random number generator | ++-----------+------------+-------------------------------------+ + +Other hardware features are not yet supported on this Zephyr port. + +The default configuration per core can be found in the defconfig files: +``boards/arm/nucleo_h723zg/nucleo_h723zg_defconfig`` + +For mode details please refer to `STM32 Nucleo-144 board User Manual`_. + +Default Zephyr Peripheral Mapping: +---------------------------------- + +The Nucleo H723ZG board features a ST Zio connector (extended Arduino Uno V3) +and a ST morpho connector. Board is configured as follows: + +- UART_3 TX/RX : PD8/PD9 (ST-Link Virtual Port Com) +- USER_PB : PC13 +- LD1 : PB0 +- LD2 : PB7 +- LD3 : PB14 +- I2C : PB8, PB9 + +System Clock +------------ + +Nucleo H723ZG System Clock could be driven by an internal or external +oscillator, as well as the main PLL clock. By default, the System clock is +driven by the PLL clock at 550MHz, driven by an 8MHz high-speed external clock. + +Serial Port +----------- + +Nucleo H723ZG board has 4 UARTs and 4 USARTs. The Zephyr console output is +assigned to UART3. Default settings are 115200 8N1. + +Programming and Debugging +************************* + +Currently the ``nucleo_h723zg`` board supports stm32cubeprogrammer (default), OpenOCD and J-Link debuggers. + +.. note:: + + Official OpenOCD support for this board was added on October '20. + Make sure your openocd version is older than that. + Following links may be helpful: `OpenOCD installing Debug Version`_ + and `OpenOCD installing with ST-LINK V3 support`_ + +.. note:: + + Check if your ST-LINK V3 has newest FW version. It can be done with `STM32CubeIDE`_ + +Flashing +======== + +Nucleo H723ZG board includes an ST-LINK/V3 embedded debug tool interface. + +First, connect the NUCLEO-H723ZG to your host computer using +the USB port to prepare it for flashing. Then build and flash your application. + +Here is an example for the :ref:`hello_world` application. + +Run a serial host program to connect with your NUCLEO-H723ZG board. + +.. code-block:: console + + $ minicom -b 115200 -D /dev/ttyACM0 + +or use screen: + +.. code-block:: console + + $ screen /dev/ttyACM0 115200 + +Build and flash the application: + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: nucleo_h723zg + :goals: build flash + +You should see the following message on the console: + +.. code-block:: console + + $ Hello World! nucleo_h723zg + +Blinky example can also be used: + +.. zephyr-app-commands:: + :zephyr-app: samples/basic/blinky + :board: nucleo_h723zg + :goals: build flash + +Debugging +========= + +You can debug an application in the usual way. Here is an example for the +:ref:`hello_world` application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: nucleo_h723zg + :maybe-skip-config: + :goals: debug + +.. _Nucleo H723ZG website: + https://www.st.com/en/evaluation-tools/nucleo-h723zg.html + +.. _STM32 Nucleo-144 board User Manual: + https://www.st.com/resource/en/user_manual/dm00499160-stm32h7-nucleo144-boards-mb1364-stmicroelectronics.pdf + +.. _STM32H723ZG on www.st.com: + https://www.st.com/en/microcontrollers-microprocessors/stm32h723zg.html + +.. _STM32H723 reference manual: + https://www.st.com/resource/en/reference_manual/dm00603761-stm32h723733-stm32h725735-and-stm32h730-value-line-advanced-armbased-32bit-mcus-stmicroelectronics.pdf + +.. _OpenOCD installing Debug Version: + https://github.com/zephyrproject-rtos/openocd + +.. _OpenOCD installing with ST-LINK V3 support: + https://mbd.kleier.net/integrating-st-link-v3.html + +.. _STM32CubeIDE: + https://www.st.com/en/development-tools/stm32cubeide.html diff --git a/boards/arm/nucleo_h723zg/nucleo_h723zg.dts b/boards/arm/nucleo_h723zg/nucleo_h723zg.dts new file mode 100644 index 00000000000..8bb0733f70e --- /dev/null +++ b/boards/arm/nucleo_h723zg/nucleo_h723zg.dts @@ -0,0 +1,105 @@ +/* + * Copyright (c) 2020 Alexander Kozhinov + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; +#include +#include +#include "arduino_r3_connector.dtsi" + +/* + * WARNING: + * JP6 and SB72 must be ON when using Ethernet. + */ + +/ { + model = "STMicroelectronics STM32H723ZG-NUCLEO board"; + compatible = "st,stm32h723zg-nucleo"; + + chosen { + zephyr,console = &usart3; + zephyr,shell-uart = &usart3; + zephyr,dtcm = &dtcm; + zephyr,sram = &sram0; + zephyr,flash = &flash0; + }; + + leds { + compatible = "gpio-leds"; + green_led: led_0 { + gpios = <&gpiob 0 GPIO_ACTIVE_HIGH>; + label = "User LD1"; + }; + yellow_led: led_1 { + gpios = <&gpioe 1 GPIO_ACTIVE_HIGH>; + label = "User LD2"; + }; + }; + + pwmleds { + compatible = "pwm-leds"; + + red_pwm_led: red_pwm_led { + pwms = <&pwm12 1 4 PWM_POLARITY_NORMAL>; + label = "User LD3 - PWM12"; + }; + }; + + gpio_keys { + compatible = "gpio-keys"; + user_button: button_0 { + label = "User"; + gpios = <&gpioc 13 GPIO_ACTIVE_HIGH>; + }; + }; + + aliases { + led0 = &green_led; + led1 = &yellow_led; + pwm-led0 = &red_pwm_led; + sw0 = &user_button; + }; +}; + +&usart3 { + pinctrl-0 = <&usart3_tx_pd8 &usart3_rx_pd9>; + current-speed = <115200>; + status = "okay"; +}; + +&rtc { + status = "okay"; +}; + +&i2c1 { + pinctrl-0 = <&i2c1_scl_pb8 &i2c1_sda_pb9>; + status = "okay"; + clock-frequency = ; +}; + +&timers12 { + status = "okay"; + + pwm12: pwm { + status = "okay"; + pinctrl-0 = <&tim12_ch1_pb14>; + }; +}; + +&mac { + status = "okay"; + pinctrl-0 = <ð_ref_clk_pa1 + ð_mdio_pa2 + ð_crs_dv_pa7 + ð_mdc_pc1 + ð_rxd0_pc4 + ð_rxd1_pc5 + ð_tx_en_pg11 + ð_txd0_pg13 + ð_txd1_pb13>; +}; + +&rng { + status = "okay"; +}; diff --git a/boards/arm/nucleo_h723zg/nucleo_h723zg.yaml b/boards/arm/nucleo_h723zg/nucleo_h723zg.yaml new file mode 100644 index 00000000000..0d380ddc2b9 --- /dev/null +++ b/boards/arm/nucleo_h723zg/nucleo_h723zg.yaml @@ -0,0 +1,19 @@ +identifier: nucleo_h723zg +name: ST Nucleo H723ZG +type: mcu +arch: arm +toolchain: + - zephyr + - gnuarmemb + - xtools +ram: 372 +flash: 1024 +supported: + - arduino_gpio + - arduino_i2c + - uart + - gpio + - counter + - i2c + - pwm + - netif:eth diff --git a/boards/arm/nucleo_h723zg/nucleo_h723zg_defconfig b/boards/arm/nucleo_h723zg/nucleo_h723zg_defconfig new file mode 100644 index 00000000000..742f3906dd8 --- /dev/null +++ b/boards/arm/nucleo_h723zg/nucleo_h723zg_defconfig @@ -0,0 +1,61 @@ +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_SOC_SERIES_STM32H7X=y +CONFIG_SOC_STM32H723XX=y +CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=550000000 + +CONFIG_BOARD_NUCLEO_H723ZG=y + +# Enable MPU +CONFIG_ARM_MPU=y + +# Enable HW stack protection +CONFIG_HW_STACK_PROTECTION=y + +# Enable UART +CONFIG_SERIAL=y + +# Console +CONFIG_CONSOLE=y +CONFIG_UART_CONSOLE=y + +# Enable Pinmux +CONFIG_PINMUX=y + +# Enable GPIO +CONFIG_GPIO=y + +# Clock Configuration +CONFIG_CLOCK_CONTROL=y + +CONFIG_CLOCK_STM32_D1CPRE=1 + +# HCLK: 275MHz +CONFIG_CLOCK_STM32_HPRE=2 + +# APB1: 137.5MHz +CONFIG_CLOCK_STM32_D2PPRE1=2 + +# APB2: 137.5MHz +CONFIG_CLOCK_STM32_D2PPRE2=2 + +# APB3: 137.5MHz +CONFIG_CLOCK_STM32_D1PPRE=2 + +# APB4: 137.5MHz +CONFIG_CLOCK_STM32_D3PPRE=2 + +# STLINK provides 8MHz clock input +CONFIG_CLOCK_STM32_HSE_CLOCK=8000000 +CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y + +# Use HSE (bypass) as PLL input +CONFIG_CLOCK_STM32_PLL_SRC_HSE=y +CONFIG_CLOCK_STM32_HSE_BYPASS=y + +# Produce 550MHz clock at PLL1 output +CONFIG_CLOCK_STM32_PLL_M_DIVISOR=4 +CONFIG_CLOCK_STM32_PLL_N_MULTIPLIER=275 +CONFIG_CLOCK_STM32_PLL_P_DIVISOR=1 +CONFIG_CLOCK_STM32_PLL_Q_DIVISOR=4 +CONFIG_CLOCK_STM32_PLL_R_DIVISOR=2 diff --git a/boards/arm/nucleo_h723zg/support/openocd.cfg b/boards/arm/nucleo_h723zg/support/openocd.cfg new file mode 100644 index 00000000000..c70e4ae5478 --- /dev/null +++ b/boards/arm/nucleo_h723zg/support/openocd.cfg @@ -0,0 +1,27 @@ +# STM32H745ZI Nucleo board OpenOCD ST-LLINK V3 configuration +# +# Copyright (c) 2020 Alexander Kozhinov +# SPDX-License-Identifier: Apache-2.0 +# + +source [find interface/stlink-dap.cfg] +transport select dapdirect_swd + +set WORKAREASIZE 0x3000 +set CHIPNAME STM32H723ZG +set BOARDNAME NUCLEO-H723ZG + +source [find target/stm32h7x.cfg] + +reset_config srst_only srst_nogate connect_assert_srst + +$_CHIPNAME.cpu0 configure -event gdb-attach { + echo "Debugger attaching: halting execution" + reset halt + gdb_breakpoint_override hard +} + +$_CHIPNAME.cpu0 configure -event gdb-detach { + echo "Debugger detaching: resuming execution" + resume +}