arch: xtensa: Reduce size of interrupt handling routines
This patch reduces the size of ISRs by changing the script to generate the dispatcher per level to, instead of generating an indirect call per mask match, do that just once at the function end. For ESP32, this provides ~380bytes of savings in a (very) hot path (text, just for the matcher functions generated by xtensa_intgen.py, drop from 2197 bytes to 1817 bytes). The generated code also uses the BIT() macro, which shifts 1UL instead of 1. Shifting a signed integer is UB in C. Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
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1 changed files with 14 additions and 5 deletions
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@ -24,6 +24,9 @@ ints_by_lvl = {}
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cindent = 0
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def cprint(s):
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global cindent
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if s.endswith(":"):
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print(s)
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return
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if s.find("}") >= 0:
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cindent -= 1
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for xx in range(cindent):
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@ -39,11 +42,10 @@ def emit_int_handler(ints):
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# handler pointer and argument as literals, saving a few
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# instructions and avoiding the need to link in
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# _sw_isr_table entirely.
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cprint("if (mask & (1 << " + str(i) + ")) {")
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cprint("struct _isr_table_entry *e = &_sw_isr_table[" + str(i) + "];")
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print("");
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cprint("e->isr(e->arg);")
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cprint("return 1 << " + str(i) + ";")
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cprint("if (mask & BIT(%d)) {" % i)
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cprint("mask = BIT(%d);" % i)
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cprint("irq = %d;" % i)
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cprint("goto handle_irq;")
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cprint("}")
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else:
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half = int(len(ints)/2)
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@ -93,6 +95,7 @@ cprint("")
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# Re-include the core-isa header and be sure our definitions match, for sanity
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cprint("#include <xtensa/config/core-isa.h>")
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cprint("#include <misc/util.h>")
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cprint("#include <sw_isr_table.h>")
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cprint("")
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for l in ints_by_lvl:
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@ -120,10 +123,16 @@ for lvl in ints_by_lvl:
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cprint("static inline int _xtensa_handle_one_int" + str(lvl) + "(unsigned int mask)")
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cprint("{")
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cprint("int irq;")
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print("")
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ints_by_lvl[lvl].sort()
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emit_int_handler(ints_by_lvl[lvl])
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cprint("return 0;")
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cprint("handle_irq:")
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cprint("_sw_isr_table[irq].isr(_sw_isr_table[irq].arg);")
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cprint("return mask;")
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cprint("}")
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cprint("")
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