drivers: spi: pw: Fix SPI Receive FIFO set
Fixes SPI Receive FIFO register set operation. Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
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1 changed files with 2 additions and 2 deletions
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@ -208,8 +208,8 @@ static void spi_pw_rx_thld_set(const struct device *dev,
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/* Rx threshold */
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reg_data = spi_pw_reg_read(dev, PW_SPI_REG_SIRF);
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reg_data = (uint32_t) ~(PW_SPI_WM_MASK);
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reg_data = PW_SPI_SIRF_WM_DFLT;
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reg_data &= (uint32_t) ~(PW_SPI_WM_MASK);
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reg_data |= PW_SPI_SIRF_WM_DFLT;
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if (spi->ctx.rx_len && spi->ctx.rx_len < spi->fifo_depth) {
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reg_data = spi->ctx.rx_len - 1;
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}
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