boards: frdm_mcxn947: Add USBHS support
Add support for the USBHS controller Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
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4 changed files with 60 additions and 0 deletions
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@ -8,6 +8,15 @@
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#include <fsl_clock.h>
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#include <fsl_spc.h>
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#include <soc.h>
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#if CONFIG_USB_DC_NXP_EHCI
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#include "usb_phy.h"
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#include "usb.h"
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/* USB PHY condfiguration */
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#define BOARD_USB_PHY_D_CAL (0x04U)
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#define BOARD_USB_PHY_TXCAL45DP (0x07U)
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#define BOARD_USB_PHY_TXCAL45DM (0x07U)
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#endif
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/* Board xtal frequency in Hz */
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#define BOARD_XTAL0_CLK_HZ 24000000U
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@ -95,6 +104,8 @@ static int frdm_mcxn947_init(void)
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/* Set AHBCLKDIV divider to value 1 */
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CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U);
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CLOCK_SetupExtClocking(BOARD_XTAL0_CLK_HZ);
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(flexcomm1), okay)
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CLOCK_SetClkDiv(kCLOCK_DivFlexcom1Clk, 1u);
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CLOCK_AttachClk(kFRO12M_to_FLEXCOMM1);
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@ -215,6 +226,48 @@ static int frdm_mcxn947_init(void)
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CLOCK_AttachClk(kFRO_HF_to_ADC0);
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#endif
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(usb1), okay) && CONFIG_USB_DC_NXP_EHCI
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usb_phy_config_struct_t usbPhyConfig = {
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BOARD_USB_PHY_D_CAL, BOARD_USB_PHY_TXCAL45DP, BOARD_USB_PHY_TXCAL45DM,
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};
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SPC0->ACTIVE_VDELAY = 0x0500;
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/* Change the power DCDC to 1.8v (By default, DCDC is 1.8V), CORELDO to 1.1v (By default,
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* CORELDO is 1.0V)
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*/
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SPC0->ACTIVE_CFG &= ~SPC_ACTIVE_CFG_CORELDO_VDD_DS_MASK;
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SPC0->ACTIVE_CFG |= SPC_ACTIVE_CFG_DCDC_VDD_LVL(0x3) | SPC_ACTIVE_CFG_CORELDO_VDD_LVL(0x3) |
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SPC_ACTIVE_CFG_SYSLDO_VDD_DS_MASK | SPC_ACTIVE_CFG_DCDC_VDD_DS(0x2u);
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/* Wait until it is done */
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while (SPC0->SC & SPC_SC_BUSY_MASK) {
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};
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if (0u == (SCG0->LDOCSR & SCG_LDOCSR_LDOEN_MASK)) {
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SCG0->TRIM_LOCK = 0x5a5a0001U;
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SCG0->LDOCSR |= SCG_LDOCSR_LDOEN_MASK;
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/* wait LDO ready */
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while (0U == (SCG0->LDOCSR & SCG_LDOCSR_VOUT_OK_MASK)) {
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};
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}
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SYSCON->AHBCLKCTRLSET[2] |= SYSCON_AHBCLKCTRL2_USB_HS_MASK |
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SYSCON_AHBCLKCTRL2_USB_HS_PHY_MASK;
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SCG0->SOSCCFG &= ~(SCG_SOSCCFG_RANGE_MASK | SCG_SOSCCFG_EREFS_MASK);
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/* xtal = 20 ~ 30MHz */
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SCG0->SOSCCFG = (1U << SCG_SOSCCFG_RANGE_SHIFT) | (1U << SCG_SOSCCFG_EREFS_SHIFT);
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SCG0->SOSCCSR |= SCG_SOSCCSR_SOSCEN_MASK;
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while (1) {
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if (SCG0->SOSCCSR & SCG_SOSCCSR_SOSCVLD_MASK) {
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break;
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}
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}
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SYSCON->CLOCK_CTRL |= SYSCON_CLOCK_CTRL_CLKIN_ENA_MASK |
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SYSCON_CLOCK_CTRL_CLKIN_ENA_FM_USBH_LPT_MASK;
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CLOCK_EnableClock(kCLOCK_UsbHs);
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CLOCK_EnableClock(kCLOCK_UsbHsPhy);
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CLOCK_EnableUsbhsPhyPllClock(kCLOCK_Usbphy480M, BOARD_XTAL0_CLK_HZ);
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CLOCK_EnableUsbhsClock();
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USB_EhciPhyInit(kUSB_ControllerEhci0, BOARD_XTAL0_CLK_HZ, &usbPhyConfig);
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#endif
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/* Set SystemCoreClock variable. */
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SystemCoreClock = CLOCK_INIT_CORE_CLOCK;
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@ -88,6 +88,8 @@ The FRDM-MCXN947 board configuration supports the following hardware features:
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+-----------+------------+-------------------------------------+
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| ADC | on-chip | adc |
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+-----------+------------+-------------------------------------+
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| USBHS | on-chip | USB device |
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+-----------+------------+-------------------------------------+
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Targets available
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==================
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@ -161,3 +161,7 @@
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&lpadc0 {
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status = "okay";
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};
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zephyr_udc0: &usb1 {
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status = "okay";
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};
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@ -26,4 +26,5 @@ supported:
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- sdhc
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- regulator
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- adc
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- usb_device
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vendor: nxp
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