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_loapic_isr_vector_get: fix implementation

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The comments state that higher-numbered vectors have priority,
but the function was doing the opposite. The code now agrees
with the comments.

Change-Id: I1a689fc22c8355458bdd734d95ff637da0655533
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
This commit is contained in:
Andrew Boie 2016-07-12 11:42:18 -07:00 • committed by Inaky Perez-Gonzalez
commit a69ea78b8a
1 changed files with 13 additions and 11 deletions
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24
drivers/interrupt_controller/loapic_intr.c
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@ -91,6 +91,7 @@
#include <arch/cpu.h>
#include <stdint.h>
#include <string.h>
#include <misc/__assert.h>
#include "board.h"
#include <toolchain.h>
@ -420,6 +421,8 @@ void _loapic_irq_disable(unsigned int irq)
* in service. And the higher vector is the indentification of the interrupt
* being currently processed.
*
* This function must be called with interrupts locked in interrupt context.
*
* ISR registers' offsets:
* --------------------
* | Offset | bits |
@ -438,20 +441,19 @@ void _loapic_irq_disable(unsigned int irq)
*/
int _loapic_isr_vector_get(void)
{
/* pointer to ISR vector table */
volatile int *pReg;
int block = 0;
int pReg, block;
while (block < 8) {
pReg = (volatile int *)
(CONFIG_LOAPIC_BASE_ADDRESS + LOAPIC_ISR + (block * 0x10));
if (*pReg) {
return (block * 32) + (find_lsb_set(*pReg) - 1);
for (block = 7; ; block--) {
pReg = sys_read32(CONFIG_LOAPIC_BASE_ADDRESS + LOAPIC_ISR +
(block * 0x10));
if (pReg) {
return (block * 32) + (find_msb_set(pReg) - 1);
}
block++;
}
__ASSERT(block >= 0,
"_loapic_isr_vector_get called but no ISR in service");
return 0;
}
CODE_UNREACHABLE;
}
#ifdef CONFIG_DEVICE_POWER_MANAGEMENT