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boards: nucleo_f031k6: Use dts for clocks configuration

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Convert board to use of device tree for clocks configuration.

Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
This commit is contained in:
Alexandre Bourdiol 2021-04-30 17:26:20 +02:00 • committed by Kumar Gala
commit a65ad11197
2 changed files with 19 additions and 13 deletions
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18
boards/arm/nucleo_f031k6/nucleo_f031k6.dts
View file

@ -40,6 +40,24 @@
};
};
&clk_hsi {
status = "okay";
};
&pll {
prediv = <4>;
mul = <12>;
clocks = <&clk_hsi>;
status = "okay";
};
&rcc {
clocks = <&pll>;
clock-frequency = <DT_FREQ_M(48)>;
ahb-prescaler = <1>;
apb1-prescaler = <1>;
};
/* Due to limited available memory, don't enable gpiod and gpiof */
/* (Test cases fail due to 'SRAM' region overflow) */
&gpiod {status = "disabled";};

14
boards/arm/nucleo_f031k6/nucleo_f031k6_defconfig
View file

@ -4,9 +4,6 @@
CONFIG_SOC_SERIES_STM32F0X=y
CONFIG_SOC_STM32F031X6=y
# General Kernel Options
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=48000000
# Kernel Options due to Low Memory (4k)
CONFIG_MAIN_STACK_SIZE=512
CONFIG_IDLE_STACK_SIZE=150
@ -28,14 +25,5 @@ CONFIG_PINMUX=y
# GPIO Controller
CONFIG_GPIO=y
# Clock configuration
# Enable Clocks
CONFIG_CLOCK_CONTROL=y
# SYSCLK selection
CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y
# use HSI as PLL input
CONFIG_CLOCK_STM32_PLL_SRC_HSI=y
# produce 48MHz clock at PLL output
CONFIG_CLOCK_STM32_PLL_PREDIV=4
CONFIG_CLOCK_STM32_PLL_MULTIPLIER=12
CONFIG_CLOCK_STM32_AHB_PRESCALER=1
CONFIG_CLOCK_STM32_APB1_PRESCALER=1