arch: xtensa: add workaround for small vector table entries
For some platforms, like NXP's IMX8 or Mediatek's MT8195, the size of an interrupt vector table entry is 0x1C bytes, less than usual (0x30 for Intel's platforms). So, the interrupt handlers don't fit in the vector table entries. I've added a small indirection to bypass this size constraint and moved the default handlers to the end of vector table, renaming them to _Level\LVL\()VectorHelper. For this, I've added a generic configuration - XTENSA_SMALL_VECTOR_TABLE_ENTRY. Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
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2 changed files with 10 additions and 2 deletions
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@ -90,4 +90,12 @@ config XTENSA_WAITI_BUG
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platforms which prefixes a WAITI entry with 128 NOP
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instructions followed by an ISYNC and EXTW.
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config XTENSA_SMALL_VECTOR_TABLE_ENTRY
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bool "Enable workaround for small vector table entries"
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help
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This option enables a small indirection to bypass the size
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constraint of the vector table entry and moved the default
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handlers to the end of vector table, renaming them to
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_Level\LVL\()VectorHelper.
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endmenu
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@ -356,7 +356,7 @@ _restore_\@:
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* with a simple jump instruction.
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*/
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.macro DEF_EXCINT LVL, ENTRY_SYM, C_HANDLER_SYM
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#if defined(CONFIG_IMX) && (MEM_VECT_TEXT_SIZE <= 0x1C)
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#if defined(CONFIG_XTENSA_SMALL_VECTOR_TABLE_ENTRY)
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.pushsection .iram.text, "ax"
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.global _Level\LVL\()VectorHelper
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_Level\LVL\()VectorHelper :
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@ -425,7 +425,7 @@ _after_imms\LVL:
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jx a0
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.popsection
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#if defined(CONFIG_IMX) && (MEM_VECT_TEXT_SIZE <= 0x1C)
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#if defined(CONFIG_XTENSA_SMALL_VECTOR_TABLE_ENTRY)
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.if \LVL == 1
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.pushsection .iram0.text, "ax"
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.elseif \LVL == XCHAL_DEBUGLEVEL
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