dts: Rename DT_.*_GPIO_* to DT_.*_GPIOS_*

Convert DT_.*_GPIO_{CONTROLLER,PIN,FLAGS} ->
	DT_.*_GPIOS_{CONTROLLER,PIN,FLAGS)

Used the following commands to make these conversions:

git grep -l DT_.*_GPIO_CONTROLLER | xargs sed -i 's/DT_\(.*\)_GPIO_CONTROLLER/DT_\1_GPIOS_CONTROLLER/g'
git grep -l DT_.*_GPIO_PIN | xargs sed -i 's/DT_\(.*\)_GPIO_PIN/DT_\1_GPIOS_PIN/g'
git grep -l DT_.*_GPIO_FLAGS | xargs sed -i 's/DT_\(.*\)_GPIO_FLAGS/DT_\1_GPIOS_FLAGS/g'

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit is contained in:
Kumar Gala 2019-06-22 10:51:09 -05:00 committed by Kumar Gala
commit a614a026b7
32 changed files with 121 additions and 121 deletions

View file

@ -402,17 +402,17 @@ the format specified by the YAML bindings. For example:
#define DT_GPIO_KEYS_0 1
/* button_0 */
#define DT_GPIO_KEYS_BUTTON_0_GPIO_CONTROLLER "GPIO_2"
#define DT_GPIO_KEYS_BUTTON_0_GPIO_FLAGS 0
#define DT_GPIO_KEYS_BUTTON_0_GPIO_PIN 6
#define DT_GPIO_KEYS_BUTTON_0_GPIOS_CONTROLLER "GPIO_2"
#define DT_GPIO_KEYS_BUTTON_0_GPIOS_FLAGS 0
#define DT_GPIO_KEYS_BUTTON_0_GPIOS_PIN 6
#define DT_GPIO_KEYS_BUTTON_0_LABEL "User SW2"
#define DT_GPIO_KEYS_SW1_GPIO_CONTROLLER DT_GPIO_KEYS_BUTTON_0_GPIO_CONTROLLER
#define DT_GPIO_KEYS_SW1_GPIO_FLAGS DT_GPIO_KEYS_BUTTON_0_GPIO_FLAGS
#define DT_GPIO_KEYS_SW1_GPIO_PIN DT_GPIO_KEYS_BUTTON_0_GPIO_PIN
#define DT_GPIO_KEYS_SW1_GPIOS_CONTROLLER DT_GPIO_KEYS_BUTTON_0_GPIOS_CONTROLLER
#define DT_GPIO_KEYS_SW1_GPIOS_FLAGS DT_GPIO_KEYS_BUTTON_0_GPIOS_FLAGS
#define DT_GPIO_KEYS_SW1_GPIOS_PIN DT_GPIO_KEYS_BUTTON_0_GPIOS_PIN
#define DT_GPIO_KEYS_SW1_LABEL DT_GPIO_KEYS_BUTTON_0_LABEL
#define SW1_GPIO_CONTROLLER DT_GPIO_KEYS_BUTTON_0_GPIO_CONTROLLER
#define SW1_GPIO_FLAGS DT_GPIO_KEYS_BUTTON_0_GPIO_FLAGS
#define SW1_GPIO_PIN DT_GPIO_KEYS_BUTTON_0_GPIO_PIN
#define SW1_GPIO_CONTROLLER DT_GPIO_KEYS_BUTTON_0_GPIOS_CONTROLLER
#define SW1_GPIO_FLAGS DT_GPIO_KEYS_BUTTON_0_GPIOS_FLAGS
#define SW1_GPIO_PIN DT_GPIO_KEYS_BUTTON_0_GPIOS_PIN
#define SW1_LABEL DT_GPIO_KEYS_BUTTON_0_LABEL
Additionally, a file named ``generated_dts_board_fixups.h`` is

View file

@ -45,11 +45,11 @@
#define CMD_OGF 1
#define CMD_OCF 2
#define GPIO_IRQ_PIN DT_INST_0_ZEPHYR_BT_HCI_SPI_IRQ_GPIO_PIN
#define GPIO_RESET_PIN DT_INST_0_ZEPHYR_BT_HCI_SPI_RESET_GPIO_PIN
#ifdef DT_INST_0_ZEPHYR_BT_HCI_SPI_CS_GPIO_PIN
#define GPIO_CS_PIN DT_INST_0_ZEPHYR_BT_HCI_SPI_CS_GPIO_PIN
#endif /* DT_INST_0_ZEPHYR_BT_HCI_SPI_CS_GPIO_PIN */
#define GPIO_IRQ_PIN DT_INST_0_ZEPHYR_BT_HCI_SPI_IRQ_GPIOS_PIN
#define GPIO_RESET_PIN DT_INST_0_ZEPHYR_BT_HCI_SPI_RESET_GPIOS_PIN
#ifdef DT_INST_0_ZEPHYR_BT_HCI_SPI_CS_GPIOS_PIN
#define GPIO_CS_PIN DT_INST_0_ZEPHYR_BT_HCI_SPI_CS_GPIOS_PIN
#endif /* DT_INST_0_ZEPHYR_BT_HCI_SPI_CS_GPIOS_PIN */
/* Max SPI buffer length for transceive operations.
*
@ -194,10 +194,10 @@ static void bt_spi_handle_vendor_evt(u8_t *rxmsg)
*/
static int configure_cs(void)
{
cs_dev = device_get_binding(DT_INST_0_ZEPHYR_BT_HCI_SPI_CS_GPIO_CONTROLLER);
cs_dev = device_get_binding(DT_INST_0_ZEPHYR_BT_HCI_SPI_CS_GPIOS_CONTROLLER);
if (!cs_dev) {
BT_ERR("Failed to initialize GPIO driver: %s",
DT_INST_0_ZEPHYR_BT_HCI_SPI_CS_GPIO_CONTROLLER);
DT_INST_0_ZEPHYR_BT_HCI_SPI_CS_GPIOS_CONTROLLER);
return -EIO;
}
@ -254,10 +254,10 @@ static int configure_cs(void)
spi_conf_cs.gpio_pin = GPIO_CS_PIN,
spi_conf_cs.gpio_dev = device_get_binding(
DT_INST_0_ZEPHYR_BT_HCI_SPI_CS_GPIO_CONTROLLER);
DT_INST_0_ZEPHYR_BT_HCI_SPI_CS_GPIOS_CONTROLLER);
if (!spi_conf_cs.gpio_dev) {
BT_ERR("Failed to initialize GPIO driver: %s",
DT_INST_0_ZEPHYR_BT_HCI_SPI_CS_GPIO_CONTROLLER);
DT_INST_0_ZEPHYR_BT_HCI_SPI_CS_GPIOS_CONTROLLER);
return -EIO;
}
@ -545,18 +545,18 @@ static int bt_spi_init(struct device *unused)
}
irq_dev = device_get_binding(
DT_INST_0_ZEPHYR_BT_HCI_SPI_IRQ_GPIO_CONTROLLER);
DT_INST_0_ZEPHYR_BT_HCI_SPI_IRQ_GPIOS_CONTROLLER);
if (!irq_dev) {
BT_ERR("Failed to initialize GPIO driver: %s",
DT_INST_0_ZEPHYR_BT_HCI_SPI_IRQ_GPIO_CONTROLLER);
DT_INST_0_ZEPHYR_BT_HCI_SPI_IRQ_GPIOS_CONTROLLER);
return -EIO;
}
rst_dev = device_get_binding(
DT_INST_0_ZEPHYR_BT_HCI_SPI_RESET_GPIO_CONTROLLER);
DT_INST_0_ZEPHYR_BT_HCI_SPI_RESET_GPIOS_CONTROLLER);
if (!rst_dev) {
BT_ERR("Failed to initialize GPIO driver: %s",
DT_INST_0_ZEPHYR_BT_HCI_SPI_RESET_GPIO_CONTROLLER);
DT_INST_0_ZEPHYR_BT_HCI_SPI_RESET_GPIOS_CONTROLLER);
return -EIO;
}

View file

@ -531,7 +531,7 @@ static int mcp2515_init(struct device *dev)
return -EINVAL;
}
#ifdef DT_INST_0_MICROCHIP_MCP2515_CS_GPIO_PIN
#ifdef DT_INST_0_MICROCHIP_MCP2515_CS_GPIOS_PIN
dev_data->spi_cs_ctrl.gpio_dev =
device_get_binding(dev_cfg->spi_cs_port);
if (!dev_data->spi_cs_ctrl.gpio_dev) {
@ -545,7 +545,7 @@ static int mcp2515_init(struct device *dev)
dev_data->spi_cfg.cs = &dev_data->spi_cs_ctrl;
#else
dev_data->spi_cfg.cs = NULL;
#endif /* DT_INST_0_MICROCHIP_MCP2515_CS_GPIO_PIN */
#endif /* DT_INST_0_MICROCHIP_MCP2515_CS_GPIOS_PIN */
/* Reset MCP2515 */
if (mcp2515_cmd_soft_reset(dev)) {
@ -614,10 +614,10 @@ static const struct mcp2515_config mcp2515_config_1 = {
.int_port = DT_INST_0_MICROCHIP_MCP2515_INT_GPIOS_CONTROLLER,
.int_thread_stack_size = CONFIG_CAN_MCP2515_INT_THREAD_STACK_SIZE,
.int_thread_priority = CONFIG_CAN_MCP2515_INT_THREAD_PRIO,
#ifdef DT_INST_0_MICROCHIP_MCP2515_CS_GPIO_PIN
.spi_cs_pin = DT_INST_0_MICROCHIP_MCP2515_CS_GPIO_PIN,
.spi_cs_port = DT_INST_0_MICROCHIP_MCP2515_CS_GPIO_CONTROLLER,
#endif /* DT_INST_0_MICROCHIP_MCP2515_CS_GPIO_PIN */
#ifdef DT_INST_0_MICROCHIP_MCP2515_CS_GPIOS_PIN
.spi_cs_pin = DT_INST_0_MICROCHIP_MCP2515_CS_GPIOS_PIN,
.spi_cs_port = DT_INST_0_MICROCHIP_MCP2515_CS_GPIOS_CONTROLLER,
#endif /* DT_INST_0_MICROCHIP_MCP2515_CS_GPIOS_PIN */
.tq_sjw = CONFIG_CAN_SJW,
.tq_prop = CONFIG_CAN_PROP_SEG,
.tq_bs1 = CONFIG_CAN_PHASE_SEG1,

View file

@ -27,9 +27,9 @@ struct mcp2515_data {
/* spi device data */
struct device *spi;
struct spi_config spi_cfg;
#ifdef DT_INST_0_MICROCHIP_MCP2515_CS_GPIO_PIN
#ifdef DT_INST_0_MICROCHIP_MCP2515_CS_GPIOS_PIN
struct spi_cs_control spi_cs_ctrl;
#endif /* DT_INST_0_MICROCHIP_MCP2515_CS_GPIO_PIN */
#endif /* DT_INST_0_MICROCHIP_MCP2515_CS_GPIOS_PIN */
/* interrupt data */
struct device *int_gpio;

View file

@ -24,7 +24,7 @@ struct ili9340_data {
struct device *command_data_gpio;
struct device *spi_dev;
struct spi_config spi_config;
#ifdef DT_INST_0_ILITEK_ILI9340_CS_GPIO_CONTROLLER
#ifdef DT_INST_0_ILITEK_ILI9340_CS_GPIOS_CONTROLLER
struct spi_cs_control cs_ctrl;
#endif
};
@ -61,10 +61,10 @@ static int ili9340_init(struct device *dev)
data->spi_config.operation = SPI_OP_MODE_MASTER | SPI_WORD_SET(8);
data->spi_config.slave = DT_INST_0_ILITEK_ILI9340_BASE_ADDRESS;
#ifdef DT_INST_0_ILITEK_ILI9340_CS_GPIO_CONTROLLER
#ifdef DT_INST_0_ILITEK_ILI9340_CS_GPIOS_CONTROLLER
data->cs_ctrl.gpio_dev =
device_get_binding(DT_INST_0_ILITEK_ILI9340_CS_GPIO_CONTROLLER);
data->cs_ctrl.gpio_pin = DT_INST_0_ILITEK_ILI9340_CS_GPIO_PIN;
device_get_binding(DT_INST_0_ILITEK_ILI9340_CS_GPIOS_CONTROLLER);
data->cs_ctrl.gpio_pin = DT_INST_0_ILITEK_ILI9340_CS_GPIOS_PIN;
data->cs_ctrl.delay = 0U;
data->spi_config.cs = &(data->cs_ctrl);
#else

View file

@ -39,7 +39,7 @@ struct ssd1673_data {
struct device *busy;
struct device *spi_dev;
struct spi_config spi_config;
#if defined(DT_INST_0_SOLOMON_SSD1673FB_CS_GPIO_CONTROLLER)
#if defined(DT_INST_0_SOLOMON_SSD1673FB_CS_GPIOS_CONTROLLER)
struct spi_cs_control cs_ctrl;
#endif
u8_t scan_mode;
@ -620,15 +620,15 @@ static int ssd1673_init(struct device *dev)
gpio_pin_configure(driver->busy, DT_INST_0_SOLOMON_SSD1673FB_BUSY_GPIOS_PIN,
GPIO_DIR_IN);
#if defined(DT_INST_0_SOLOMON_SSD1673FB_CS_GPIO_CONTROLLER)
#if defined(DT_INST_0_SOLOMON_SSD1673FB_CS_GPIOS_CONTROLLER)
driver->cs_ctrl.gpio_dev = device_get_binding(
DT_INST_0_SOLOMON_SSD1673FB_CS_GPIO_CONTROLLER);
DT_INST_0_SOLOMON_SSD1673FB_CS_GPIOS_CONTROLLER);
if (!driver->cs_ctrl.gpio_dev) {
LOG_ERR("Unable to get SPI GPIO CS device");
return -EIO;
}
driver->cs_ctrl.gpio_pin = DT_INST_0_SOLOMON_SSD1673FB_CS_GPIO_PIN;
driver->cs_ctrl.gpio_pin = DT_INST_0_SOLOMON_SSD1673FB_CS_GPIOS_PIN;
driver->cs_ctrl.delay = 0U;
driver->spi_config.cs = &driver->cs_ctrl;
#endif

View file

@ -764,8 +764,8 @@ static const struct eth_enc28j60_config eth_enc28j60_0_config = {
.spi_freq = DT_INST_0_MICROCHIP_ENC28J60_SPI_MAX_FREQUENCY,
.spi_slave = DT_INST_0_MICROCHIP_ENC28J60_BASE_ADDRESS,
#ifdef CONFIG_ETH_ENC28J60_0_GPIO_SPI_CS
.spi_cs_port = DT_INST_0_MICROCHIP_ENC28J60_CS_GPIO_CONTROLLER,
.spi_cs_pin = DT_INST_0_MICROCHIP_ENC28J60_CS_GPIO_PIN,
.spi_cs_port = DT_INST_0_MICROCHIP_ENC28J60_CS_GPIOS_CONTROLLER,
.spi_cs_pin = DT_INST_0_MICROCHIP_ENC28J60_CS_GPIOS_PIN,
#endif /* CONFIG_ETH_ENC28J60_0_GPIO_SPI_CS */
.full_duplex = IS_ENABLED(CONFIG_ETH_ENC28J60_0_FULL_DUPLEX),
.timeout = CONFIG_ETH_ENC28J60_TIMEOUT,

View file

@ -412,12 +412,12 @@ static int spi_flash_wb_configure(struct device *dev)
#if defined(CONFIG_SPI_FLASH_W25QXXDV_GPIO_SPI_CS)
data->cs_ctrl.gpio_dev = device_get_binding(
DT_INST_0_WINBOND_W25Q16_CS_GPIO_CONTROLLER);
DT_INST_0_WINBOND_W25Q16_CS_GPIOS_CONTROLLER);
if (!data->cs_ctrl.gpio_dev) {
return -ENODEV;
}
data->cs_ctrl.gpio_pin = DT_INST_0_WINBOND_W25Q16_CS_GPIO_PIN;
data->cs_ctrl.gpio_pin = DT_INST_0_WINBOND_W25Q16_CS_GPIOS_PIN;
data->cs_ctrl.delay = CONFIG_SPI_FLASH_W25QXXDV_GPIO_CS_WAIT_DELAY;
data->spi_cfg.cs = &data->cs_ctrl;

View file

@ -47,9 +47,9 @@
struct spi_nor_data {
struct device *spi;
struct spi_config spi_cfg;
#ifdef DT_INST_0_JEDEC_SPI_NOR_CS_GPIO_CONTROLLER
#ifdef DT_INST_0_JEDEC_SPI_NOR_CS_GPIOS_CONTROLLER
struct spi_cs_control cs_ctrl;
#endif /* DT_INST_0_JEDEC_SPI_NOR_CS_GPIO_CONTROLLER */
#endif /* DT_INST_0_JEDEC_SPI_NOR_CS_GPIOS_CONTROLLER */
struct k_sem sem;
};
@ -348,18 +348,18 @@ static int spi_nor_configure(struct device *dev)
data->spi_cfg.operation = SPI_WORD_SET(8);
data->spi_cfg.slave = DT_INST_0_JEDEC_SPI_NOR_BASE_ADDRESS;
#ifdef DT_INST_0_JEDEC_SPI_NOR_CS_GPIO_CONTROLLER
#ifdef DT_INST_0_JEDEC_SPI_NOR_CS_GPIOS_CONTROLLER
data->cs_ctrl.gpio_dev =
device_get_binding(DT_INST_0_JEDEC_SPI_NOR_CS_GPIO_CONTROLLER);
device_get_binding(DT_INST_0_JEDEC_SPI_NOR_CS_GPIOS_CONTROLLER);
if (!data->cs_ctrl.gpio_dev) {
return -ENODEV;
}
data->cs_ctrl.gpio_pin = DT_INST_0_JEDEC_SPI_NOR_CS_GPIO_PIN;
data->cs_ctrl.gpio_pin = DT_INST_0_JEDEC_SPI_NOR_CS_GPIOS_PIN;
data->cs_ctrl.delay = CONFIG_SPI_NOR_CS_WAIT_DELAY;
data->spi_cfg.cs = &data->cs_ctrl;
#endif /* DT_INST_0_JEDEC_SPI_NOR_CS_GPIO_CONTROLLER */
#endif /* DT_INST_0_JEDEC_SPI_NOR_CS_GPIOS_CONTROLLER */
/* now the spi bus is configured, we can verify the flash id */
if (spi_nor_read_id(dev, params) != 0) {

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@ -985,20 +985,20 @@ static inline int configure_spi(struct device *dev)
#if defined(CONFIG_IEEE802154_CC2520_GPIO_SPI_CS)
cs_ctrl.gpio_dev = device_get_binding(
DT_INST_0_TI_CC2520_CS_GPIO_CONTROLLER);
DT_INST_0_TI_CC2520_CS_GPIOS_CONTROLLER);
if (!cs_ctrl.gpio_dev) {
LOG_ERR("Unable to get GPIO SPI CS device");
return -ENODEV;
}
cs_ctrl.gpio_pin = DT_INST_0_TI_CC2520_CS_GPIO_PIN;
cs_ctrl.gpio_pin = DT_INST_0_TI_CC2520_CS_GPIOS_PIN;
cs_ctrl.delay = 0U;
cc2520->spi_cfg.cs = &cs_ctrl;
LOG_DBG("SPI GPIO CS configured on %s:%u",
DT_INST_0_TI_CC2520_CS_GPIO_CONTROLLER,
DT_INST_0_TI_CC2520_CS_GPIO_PIN);
DT_INST_0_TI_CC2520_CS_GPIOS_CONTROLLER,
DT_INST_0_TI_CC2520_CS_GPIOS_PIN);
#endif /* CONFIG_IEEE802154_CC2520_GPIO_SPI_CS */
cc2520->spi_cfg.frequency = DT_INST_0_TI_CC2520_SPI_MAX_FREQUENCY;

View file

@ -1378,23 +1378,23 @@ static inline int configure_spi(struct device *dev)
return -ENODEV;
}
#if defined(DT_NXP_MCR20A_0_CS_GPIO_CONTROLLER)
#if defined(DT_NXP_MCR20A_0_CS_GPIOS_CONTROLLER)
mcr20a->cs_ctrl.gpio_dev = device_get_binding(
DT_NXP_MCR20A_0_CS_GPIO_CONTROLLER);
DT_NXP_MCR20A_0_CS_GPIOS_CONTROLLER);
if (!mcr20a->cs_ctrl.gpio_dev) {
LOG_ERR("Unable to get GPIO SPI CS device");
return -ENODEV;
}
mcr20a->cs_ctrl.gpio_pin = DT_NXP_MCR20A_0_CS_GPIO_PIN;
mcr20a->cs_ctrl.gpio_pin = DT_NXP_MCR20A_0_CS_GPIOS_PIN;
mcr20a->cs_ctrl.delay = 0U;
mcr20a->spi_cfg.cs = &mcr20a->cs_ctrl;
LOG_DBG("SPI GPIO CS configured on %s:%u",
DT_NXP_MCR20A_0_CS_GPIO_CONTROLLER,
DT_NXP_MCR20A_0_CS_GPIO_PIN);
#endif /* DT_NXP_MCR20A_0_CS_GPIO_CONTROLLER */
DT_NXP_MCR20A_0_CS_GPIOS_CONTROLLER,
DT_NXP_MCR20A_0_CS_GPIOS_PIN);
#endif /* DT_NXP_MCR20A_0_CS_GPIOS_CONTROLLER */
mcr20a->spi_cfg.frequency = DT_INST_0_NXP_MCR20A_SPI_MAX_FREQUENCY;
mcr20a->spi_cfg.operation = SPI_WORD_SET(8);

View file

@ -25,7 +25,7 @@ struct mcr20a_context {
struct gpio_callback irqb_cb;
struct device *spi;
struct spi_config spi_cfg;
#if defined(DT_NXP_MCR20A_0_CS_GPIO_CONTROLLER)
#if defined(DT_NXP_MCR20A_0_CS_GPIOS_CONTROLLER)
struct spi_cs_control cs_ctrl;
#endif
u8_t mac_addr[8];

View file

@ -734,7 +734,7 @@ static int adxl362_init(struct device *dev)
data->spi_cfg.frequency = config->spi_max_frequency;
data->spi_cfg.slave = config->spi_slave;
#if defined(DT_INST_0_ADI_ADXL362_CS_GPIO_CONTROLLER)
#if defined(DT_INST_0_ADI_ADXL362_CS_GPIOS_CONTROLLER)
data->adxl362_cs_ctrl.gpio_dev =
device_get_binding(config->gpio_cs_port);
if (!data->adxl362_cs_ctrl.gpio_dev) {
@ -788,9 +788,9 @@ static const struct adxl362_config adxl362_config = {
.spi_name = DT_INST_0_ADI_ADXL362_BUS_NAME,
.spi_slave = DT_INST_0_ADI_ADXL362_BASE_ADDRESS,
.spi_max_frequency = DT_INST_0_ADI_ADXL362_SPI_MAX_FREQUENCY,
#if defined(DT_INST_0_ADI_ADXL362_CS_GPIO_CONTROLLER)
.gpio_cs_port = DT_INST_0_ADI_ADXL362_CS_GPIO_CONTROLLER,
.cs_gpio = DT_INST_0_ADI_ADXL362_CS_GPIO_PIN,
#if defined(DT_INST_0_ADI_ADXL362_CS_GPIOS_CONTROLLER)
.gpio_cs_port = DT_INST_0_ADI_ADXL362_CS_GPIOS_CONTROLLER,
.cs_gpio = DT_INST_0_ADI_ADXL362_CS_GPIOS_PIN,
#endif
#if defined(CONFIG_ADXL362_TRIGGER)
.gpio_port = DT_INST_0_ADI_ADXL362_INT1_GPIOS_CONTROLLER,

View file

@ -174,7 +174,7 @@ struct adxl362_config {
char *spi_name;
u32_t spi_max_frequency;
u16_t spi_slave;
#if defined(DT_INST_0_ADI_ADXL362_CS_GPIO_CONTROLLER)
#if defined(DT_INST_0_ADI_ADXL362_CS_GPIOS_CONTROLLER)
const char *gpio_cs_port;
u8_t cs_gpio;
#endif
@ -189,7 +189,7 @@ struct adxl362_config {
struct adxl362_data {
struct device *spi;
struct spi_config spi_cfg;
#if defined(DT_INST_0_ADI_ADXL362_CS_GPIO_CONTROLLER)
#if defined(DT_INST_0_ADI_ADXL362_CS_GPIOS_CONTROLLER)
struct spi_cs_control adxl362_cs_ctrl;
#endif
s16_t acc_x;

View file

@ -898,7 +898,7 @@ static int adxl372_init(struct device *dev)
data->spi_cfg.frequency = cfg->spi_max_frequency;
data->spi_cfg.slave = cfg->spi_slave;
#if defined(DT_INST_0_ADI_ADXL372_CS_GPIO_CONTROLLER)
#if defined(DT_INST_0_ADI_ADXL372_CS_GPIOS_CONTROLLER)
/* handle SPI CS thru GPIO if it is the case */
data->adxl372_cs_ctrl.gpio_dev = device_get_binding(cfg->gpio_cs_port);
@ -932,9 +932,9 @@ static const struct adxl372_dev_config adxl372_config = {
.spi_port = DT_INST_0_ADI_ADXL372_BUS_NAME,
.spi_slave = DT_INST_0_ADI_ADXL372_BASE_ADDRESS,
.spi_max_frequency = DT_INST_0_ADI_ADXL372_SPI_MAX_FREQUENCY,
#ifdef DT_INST_0_ADI_ADXL372_CS_GPIO_CONTROLLER
.gpio_cs_port = DT_INST_0_ADI_ADXL372_CS_GPIO_CONTROLLER,
.cs_gpio = DT_INST_0_ADI_ADXL372_CS_GPIO_PIN,
#ifdef DT_INST_0_ADI_ADXL372_CS_GPIOS_CONTROLLER
.gpio_cs_port = DT_INST_0_ADI_ADXL372_CS_GPIOS_CONTROLLER,
.cs_gpio = DT_INST_0_ADI_ADXL372_CS_GPIOS_PIN,
#endif
#endif
#ifdef CONFIG_ADXL372_TRIGGER

View file

@ -282,7 +282,7 @@ struct adxl372_data {
struct device *bus;
#ifdef CONFIG_ADXL372_SPI
struct spi_config spi_cfg;
#if defined(DT_INST_0_ADI_ADXL372_CS_GPIO_CONTROLLER)
#if defined(DT_INST_0_ADI_ADXL372_CS_GPIOS_CONTROLLER)
struct spi_cs_control adxl372_cs_ctrl;
#endif
#endif
@ -318,7 +318,7 @@ struct adxl372_dev_config {
const char *spi_port;
u16_t spi_slave;
u32_t spi_max_frequency;
#if defined(DT_INST_0_ADI_ADXL372_CS_GPIO_CONTROLLER)
#if defined(DT_INST_0_ADI_ADXL372_CS_GPIOS_CONTROLLER)
const char *gpio_cs_port;
u8_t cs_gpio;
#endif

View file

@ -171,13 +171,13 @@
#if defined(DT_INST_0_ST_LIS2DH_IRQ_GPIOS_CONTROLLER_1)
/* INT1 and INT2 are configured */
#define DT_LIS2DH_INT1_GPIO_PIN DT_INST_0_ST_LIS2DH_IRQ_GPIOS_PIN_0
#define DT_LIS2DH_INT1_GPIOS_PIN DT_INST_0_ST_LIS2DH_IRQ_GPIOS_PIN_0
#define DT_LIS2DH_INT1_GPIO_DEV_NAME DT_INST_0_ST_LIS2DH_IRQ_GPIOS_CONTROLLER_0
#define DT_LIS2DH_INT2_GPIO_PIN DT_INST_0_ST_LIS2DH_IRQ_GPIOS_PIN_1
#define DT_LIS2DH_INT2_GPIOS_PIN DT_INST_0_ST_LIS2DH_IRQ_GPIOS_PIN_1
#define DT_LIS2DH_INT2_GPIO_DEV_NAME DT_INST_0_ST_LIS2DH_IRQ_GPIOS_CONTROLLER_1
#else
/* INT1 only */
#define DT_LIS2DH_INT1_GPIO_PIN DT_INST_0_ST_LIS2DH_IRQ_GPIOS_PIN
#define DT_LIS2DH_INT1_GPIOS_PIN DT_INST_0_ST_LIS2DH_IRQ_GPIOS_PIN
#define DT_LIS2DH_INT1_GPIO_DEV_NAME DT_INST_0_ST_LIS2DH_IRQ_GPIOS_CONTROLLER
#endif

View file

@ -23,7 +23,7 @@ static int lis2dh_trigger_drdy_set(struct device *dev, enum sensor_channel chan,
struct lis2dh_data *lis2dh = dev->driver_data;
int status;
gpio_pin_disable_callback(lis2dh->gpio_int1, DT_LIS2DH_INT1_GPIO_PIN);
gpio_pin_disable_callback(lis2dh->gpio_int1, DT_LIS2DH_INT1_GPIOS_PIN);
/* cancel potentially pending trigger */
atomic_clear_bit(&lis2dh->trig_flags, TRIGGED_INT1);
@ -78,7 +78,7 @@ static int lis2dh_start_trigger_int1(struct device *dev)
return status;
}
gpio_pin_enable_callback(lis2dh->gpio_int1, DT_LIS2DH_INT1_GPIO_PIN);
gpio_pin_enable_callback(lis2dh->gpio_int1, DT_LIS2DH_INT1_GPIOS_PIN);
/* re-enable output sampling */
status = lis2dh_reg_write_byte(dev, LIS2DH_REG_CTRL1, ctrl1);
@ -102,7 +102,7 @@ static int lis2dh_trigger_anym_set(struct device *dev,
int status;
u8_t reg_val;
gpio_pin_disable_callback(lis2dh->gpio_int2, DT_LIS2DH_INT2_GPIO_PIN);
gpio_pin_disable_callback(lis2dh->gpio_int2, DT_LIS2DH_INT2_GPIOS_PIN);
/* cancel potentially pending trigger */
atomic_clear_bit(&lis2dh->trig_flags, TRIGGED_INT2);
@ -136,7 +136,7 @@ static int lis2dh_start_trigger_int2(struct device *dev)
int status;
status = gpio_pin_enable_callback(lis2dh->gpio_int2,
DT_LIS2DH_INT2_GPIO_PIN);
DT_LIS2DH_INT2_GPIOS_PIN);
if (unlikely(status < 0)) {
LOG_ERR("enable callback failed err=%d", status);
}
@ -367,17 +367,17 @@ int lis2dh_init_interrupt(struct device *dev)
}
/* data ready int1 gpio configuration */
status = gpio_pin_configure(lis2dh->gpio_int1, DT_LIS2DH_INT1_GPIO_PIN,
status = gpio_pin_configure(lis2dh->gpio_int1, DT_LIS2DH_INT1_GPIOS_PIN,
LIS2DH_INT1_CFG);
if (status < 0) {
LOG_ERR("Could not configure gpio %d",
DT_LIS2DH_INT1_GPIO_PIN);
DT_LIS2DH_INT1_GPIOS_PIN);
return status;
}
gpio_init_callback(&lis2dh->gpio_int1_cb,
lis2dh_gpio_int1_callback,
BIT(DT_LIS2DH_INT1_GPIO_PIN));
BIT(DT_LIS2DH_INT1_GPIOS_PIN));
status = gpio_add_callback(lis2dh->gpio_int1, &lis2dh->gpio_int1_cb);
if (status < 0) {
@ -386,7 +386,7 @@ int lis2dh_init_interrupt(struct device *dev)
}
LOG_INF("int1 on pin=%d cfg=0x%x",
DT_LIS2DH_INT1_GPIO_PIN, LIS2DH_INT1_CFG);
DT_LIS2DH_INT1_GPIOS_PIN, LIS2DH_INT1_CFG);
#if defined(DT_INST_0_ST_LIS2DH_IRQ_GPIOS_CONTROLLER_1)
/* setup any motion gpio interrupt */
@ -398,17 +398,17 @@ int lis2dh_init_interrupt(struct device *dev)
}
/* any motion int2 gpio configuration */
status = gpio_pin_configure(lis2dh->gpio_int2, DT_LIS2DH_INT2_GPIO_PIN,
status = gpio_pin_configure(lis2dh->gpio_int2, DT_LIS2DH_INT2_GPIOS_PIN,
LIS2DH_INT2_CFG);
if (status < 0) {
LOG_ERR("Could not configure gpio %d",
DT_LIS2DH_INT2_GPIO_PIN);
DT_LIS2DH_INT2_GPIOS_PIN);
return status;
}
gpio_init_callback(&lis2dh->gpio_int2_cb,
lis2dh_gpio_int2_callback,
BIT(DT_LIS2DH_INT2_GPIO_PIN));
BIT(DT_LIS2DH_INT2_GPIOS_PIN));
/* callback is going to be enabled by trigger setting function */
status = gpio_add_callback(lis2dh->gpio_int2, &lis2dh->gpio_int2_cb);
@ -418,7 +418,7 @@ int lis2dh_init_interrupt(struct device *dev)
}
LOG_INF("int2 on pin=%d cfg=0x%x",
DT_LIS2DH_INT2_GPIO_PIN, LIS2DH_INT2_CFG);
DT_LIS2DH_INT2_GPIOS_PIN, LIS2DH_INT2_CFG);
#endif /* DT_INST_0_ST_LIS2DH_IRQ_GPIOS_CONTROLLER_1 */
#if defined(CONFIG_LIS2DH_TRIGGER_OWN_THREAD)

View file

@ -21,7 +21,7 @@
#define LOG_LEVEL CONFIG_SENSOR_LOG_LEVEL
LOG_MODULE_DECLARE(LIS2DS12);
#if defined(DT_INST_0_ST_LIS2DS12_CS_GPIO_CONTROLLER)
#if defined(DT_INST_0_ST_LIS2DS12_CS_GPIOS_CONTROLLER)
static struct spi_cs_control lis2ds12_cs_ctrl;
#endif
@ -156,23 +156,23 @@ int lis2ds12_spi_init(struct device *dev)
data->hw_tf = &lis2ds12_spi_transfer_fn;
#if defined(DT_INST_0_ST_LIS2DS12_CS_GPIO_CONTROLLER)
#if defined(DT_INST_0_ST_LIS2DS12_CS_GPIOS_CONTROLLER)
/* handle SPI CS thru GPIO if it is the case */
lis2ds12_cs_ctrl.gpio_dev = device_get_binding(
DT_INST_0_ST_LIS2DS12_CS_GPIO_CONTROLLER);
DT_INST_0_ST_LIS2DS12_CS_GPIOS_CONTROLLER);
if (!lis2ds12_cs_ctrl.gpio_dev) {
LOG_ERR("Unable to get GPIO SPI CS device");
return -ENODEV;
}
lis2ds12_cs_ctrl.gpio_pin = DT_INST_0_ST_LIS2DS12_CS_GPIO_PIN;
lis2ds12_cs_ctrl.gpio_pin = DT_INST_0_ST_LIS2DS12_CS_GPIOS_PIN;
lis2ds12_cs_ctrl.delay = 0U;
lis2ds12_spi_conf.cs = &lis2ds12_cs_ctrl;
LOG_DBG("SPI GPIO CS configured on %s:%u",
DT_INST_0_ST_LIS2DS12_CS_GPIO_CONTROLLER,
DT_INST_0_ST_LIS2DS12_CS_GPIO_PIN);
DT_INST_0_ST_LIS2DS12_CS_GPIOS_CONTROLLER,
DT_INST_0_ST_LIS2DS12_CS_GPIOS_PIN);
#endif
return 0;

View file

@ -117,7 +117,7 @@ struct lis2dw12_data {
struct device *dev;
#endif /* CONFIG_LIS2DW12_TRIGGER_GLOBAL_THREAD */
#endif /* CONFIG_LIS2DW12_TRIGGER */
#if defined(DT_INST_0_ST_LIS2DW12_CS_GPIO_CONTROLLER)
#if defined(DT_INST_0_ST_LIS2DW12_CS_GPIOS_CONTROLLER)
struct spi_cs_control cs_ctrl;
#endif
};

View file

@ -103,23 +103,23 @@ int lis2dw12_spi_init(struct device *dev)
data->ctx = &lis2dw12_spi_ctx;
data->ctx->handle = data;
#if defined(DT_INST_0_ST_LIS2DW12_CS_GPIO_CONTROLLER)
#if defined(DT_INST_0_ST_LIS2DW12_CS_GPIOS_CONTROLLER)
/* handle SPI CS thru GPIO if it is the case */
data->cs_ctrl.gpio_dev = device_get_binding(
DT_INST_0_ST_LIS2DW12_CS_GPIO_CONTROLLER);
DT_INST_0_ST_LIS2DW12_CS_GPIOS_CONTROLLER);
if (!data->cs_ctrl.gpio_dev) {
LOG_ERR("Unable to get GPIO SPI CS device");
return -ENODEV;
}
data->cs_ctrl.gpio_pin = DT_INST_0_ST_LIS2DW12_CS_GPIO_PIN;
data->cs_ctrl.gpio_pin = DT_INST_0_ST_LIS2DW12_CS_GPIOS_PIN;
data->cs_ctrl.delay = 0U;
lis2dw12_spi_conf.cs = &data->cs_ctrl;
LOG_DBG("SPI GPIO CS configured on %s:%u",
DT_INST_0_ST_LIS2DW12_CS_GPIO_CONTROLLER,
DT_INST_0_ST_LIS2DW12_CS_GPIO_PIN);
DT_INST_0_ST_LIS2DW12_CS_GPIOS_CONTROLLER,
DT_INST_0_ST_LIS2DW12_CS_GPIOS_PIN);
#endif
return 0;

View file

@ -19,7 +19,7 @@
#define LOG_LEVEL CONFIG_SENSOR_LOG_LEVEL
LOG_MODULE_DECLARE(LSM6DSL);
#if defined(DT_INST_0_ST_LSM6DSL_CS_GPIO_CONTROLLER)
#if defined(DT_INST_0_ST_LSM6DSL_CS_GPIOS_CONTROLLER)
static struct spi_cs_control lsm6dsl_cs_ctrl;
#endif
@ -147,23 +147,23 @@ int lsm6dsl_spi_init(struct device *dev)
data->hw_tf = &lsm6dsl_spi_transfer_fn;
#if defined(DT_INST_0_ST_LSM6DSL_CS_GPIO_CONTROLLER)
#if defined(DT_INST_0_ST_LSM6DSL_CS_GPIOS_CONTROLLER)
/* handle SPI CS thru GPIO if it is the case */
lsm6dsl_cs_ctrl.gpio_dev = device_get_binding(
DT_INST_0_ST_LSM6DSL_CS_GPIO_CONTROLLER);
DT_INST_0_ST_LSM6DSL_CS_GPIOS_CONTROLLER);
if (!lsm6dsl_cs_ctrl.gpio_dev) {
LOG_ERR("Unable to get GPIO SPI CS device");
return -ENODEV;
}
lsm6dsl_cs_ctrl.gpio_pin = DT_INST_0_ST_LSM6DSL_CS_GPIO_PIN;
lsm6dsl_cs_ctrl.gpio_pin = DT_INST_0_ST_LSM6DSL_CS_GPIOS_PIN;
lsm6dsl_cs_ctrl.delay = 0U;
lsm6dsl_spi_conf.cs = &lsm6dsl_cs_ctrl;
LOG_DBG("SPI GPIO CS configured on %s:%u",
DT_INST_0_ST_LSM6DSL_CS_GPIO_CONTROLLER,
DT_INST_0_ST_LSM6DSL_CS_GPIO_PIN);
DT_INST_0_ST_LSM6DSL_CS_GPIOS_CONTROLLER,
DT_INST_0_ST_LSM6DSL_CS_GPIOS_PIN);
#endif
return 0;

View file

@ -236,8 +236,8 @@ int eswifi_spi_init(struct eswifi_dev *eswifi)
SPI_HOLD_ON_CS | SPI_LOCK_ON);
spi->spi_cfg.slave = DT_INVENTEK_ESWIFI_ESWIFI0_BASE_ADDRESS;
spi->spi_cs.gpio_dev =
device_get_binding(DT_INVENTEK_ESWIFI_ESWIFI0_CS_GPIO_CONTROLLER);
spi->spi_cs.gpio_pin = DT_INVENTEK_ESWIFI_ESWIFI0_CS_GPIO_PIN;
device_get_binding(DT_INVENTEK_ESWIFI_ESWIFI0_CS_GPIOS_CONTROLLER);
spi->spi_cs.gpio_pin = DT_INVENTEK_ESWIFI_ESWIFI0_CS_GPIOS_PIN;
spi->spi_cs.delay = 1000U;
spi->spi_cfg.cs = &spi->spi_cs;

View file

@ -108,20 +108,20 @@ s8_t nm_bus_init(void *pvinit)
#ifdef CONFIG_WIFI_WINC1500_GPIO_SPI_CS
cs_ctrl.gpio_dev = device_get_binding(
DT_INST_0_ATMEL_WINC1500_CS_GPIO_CONTROLLER);
DT_INST_0_ATMEL_WINC1500_CS_GPIOS_CONTROLLER);
if (!cs_ctrl.gpio_dev) {
LOG_ERR("Unable to get GPIO SPI CS device");
return -ENODEV;
}
cs_ctrl.gpio_pin = DT_INST_0_ATMEL_WINC1500_CS_GPIO_PIN;
cs_ctrl.gpio_pin = DT_INST_0_ATMEL_WINC1500_CS_GPIOS_PIN;
cs_ctrl.delay = 0U;
winc1500.spi_cfg.cs = &cs_ctrl;
LOG_DBG("SPI GPIO CS configured on %s:%u",
DT_INST_0_ATMEL_WINC1500_CS_GPIO_CONTROLLER,
DT_INST_0_ATMEL_WINC1500_CS_GPIO_PIN);
DT_INST_0_ATMEL_WINC1500_CS_GPIOS_CONTROLLER,
DT_INST_0_ATMEL_WINC1500_CS_GPIOS_PIN);
#endif /* CONFIG_WIFI_WINC1500_GPIO_SPI_CS */
nm_bsp_reset();

View file

@ -3,6 +3,6 @@ sample:
tests:
sample.blinky:
tags: LED gpio
filter: DT_GPIO_LEDS_LED0_GPIO_CONTROLLER
filter: DT_GPIO_LEDS_LED0_GPIOS_CONTROLLER
depends_on: gpio
harness: led

View file

@ -3,6 +3,6 @@ sample:
tests:
sample.button:
tags: button gpio
filter: DT_GPIO_KEYS_SW0_GPIO_CONTROLLER
filter: DT_GPIO_KEYS_SW0_GPIOS_CONTROLLER
depends_on: gpio
harness: button

View file

@ -2,7 +2,7 @@ sample:
name: Disco Lights
tests:
sample.disco:
filter: DT_GPIO_LEDS_LED0_GPIO_CONTROLLER and DT_GPIO_LEDS_LED1_GPIO_CONTROLLER
filter: DT_GPIO_LEDS_LED0_GPIO_CONTROLLER and DT_GPIO_LEDS_LED1_GPIOS_CONTROLLER
tags: LED gpio
depends_on: gpio
harness: led

View file

@ -5,7 +5,7 @@ sample:
tests:
sample.threads:
tags: kernel threads gpio
filter: DT_GPIO_LEDS_LED0_GPIO_CONTROLLER and DT_GPIO_LEDS_LED1_GPIO_CONTROLLER
filter: DT_GPIO_LEDS_LED0_GPIO_CONTROLLER and DT_GPIO_LEDS_LED1_GPIOS_CONTROLLER
depends_on: gpio
harness: console
harness_config:

View file

@ -48,7 +48,7 @@ LOG_MODULE_REGISTER(LOG_MODULE_NAME);
#define PACKET_TYPE 0
#define EVT_BLUE_INITIALIZED 0x01
#define GPIO_IRQ_PIN DT_INST_0_ZEPHYR_BT_HCI_SPI_SLAVE_IRQ_GPIO_PIN
#define GPIO_IRQ_PIN DT_INST_0_ZEPHYR_BT_HCI_SPI_SLAVE_IRQ_GPIOS_PIN
/* Needs to be aligned with the SPI master buffer size */
#define SPI_MAX_MSG_LEN 255
@ -278,7 +278,7 @@ static int hci_spi_init(struct device *unused)
}
gpio_dev = device_get_binding(
DT_INST_0_ZEPHYR_BT_HCI_SPI_SLAVE_IRQ_GPIO_CONTROLLER);
DT_INST_0_ZEPHYR_BT_HCI_SPI_SLAVE_IRQ_GPIOS_CONTROLLER);
if (!gpio_dev) {
return -EINVAL;
}

View file

@ -3,7 +3,7 @@ sample:
tests:
sample.driver.gpio:
tags: drivers
filter: DT_GPIO_LEDS_LED0_GPIO_CONTROLLER and DT_GPIO_KEYS_SW0_GPIO_CONTROLLER
filter: DT_GPIO_LEDS_LED0_GPIO_CONTROLLER and DT_GPIO_KEYS_SW0_GPIOS_CONTROLLER
harness: console
harness_config:
type: one_line

View file

@ -902,10 +902,10 @@ static int sdhc_init(struct device *dev)
data->cfg.frequency = SDHC_INITIAL_SPEED;
data->cfg.operation = SPI_WORD_SET(8) | SPI_HOLD_ON_CS;
data->cfg.slave = DT_INST_0_ZEPHYR_MMC_SPI_SLOT_BASE_ADDRESS;
data->cs = device_get_binding(DT_INST_0_ZEPHYR_MMC_SPI_SLOT_CS_GPIO_CONTROLLER);
data->cs = device_get_binding(DT_INST_0_ZEPHYR_MMC_SPI_SLOT_CS_GPIOS_CONTROLLER);
__ASSERT_NO_MSG(data->cs != NULL);
data->pin = DT_INST_0_ZEPHYR_MMC_SPI_SLOT_CS_GPIO_PIN;
data->pin = DT_INST_0_ZEPHYR_MMC_SPI_SLOT_CS_GPIOS_PIN;
disk_sdhc_init(dev);

View file

@ -16,8 +16,8 @@
#define DT_INST_0_ADI_ADXL362_BASE_ADDRESS 0
#define DT_INST_0_ADI_ADXL362_INT1_GPIOS_CONTROLLER ""
#define DT_INST_0_ADI_ADXL362_INT1_GPIOS_PIN 0
#define DT_INST_0_ADI_ADXL362_CS_GPIO_CONTROLLER 0
#define DT_INST_0_ADI_ADXL362_CS_GPIO_PIN 0
#define DT_INST_0_ADI_ADXL362_CS_GPIOS_CONTROLLER 0
#define DT_INST_0_ADI_ADXL362_CS_GPIOS_PIN 0
#define DT_INST_0_ADI_ADXL362_SPI_MAX_FREQUENCY 0
#endif