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doc: release: 2.7: Add note about risc-v

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Add risc-v general notes related to cpu bindings and ITCM/DTCM cache
linker support.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
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Gerson Fernando Budke 2021-09-25 13:56:29 -03:00 • committed by Anas Nashif
commit a60ce93042
1 changed files with 6 additions and 0 deletions
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6
doc/releases/release-notes-2.7.rst
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@ -148,6 +148,12 @@ Architectures
* AARCH64
* RISC-V
* Added support to RISC-V CPU devicetree compatible bindings
* Added support to link with ITCM & DTCM sections
* x86