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driver: scfg: npcx: cleanup low-voltage detection configuration

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Cleanup npcx low-voltage (1.8V) detection configuration. It removes
unused soc utilities, macros, and DT node. We will configure this
feature by GPIO driver with GPIO_VOLTAGE_1P8 flag later.

Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
This commit is contained in:
Mulin Chao 2022-07-18 02:13:40 -07:00 • committed by Carles Cufí
commit a5fee4c6de
7 changed files with 0 additions and 185 deletions
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10
dts/arm/nuvoton/npcx.dtsi
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@ -44,16 +44,6 @@
pinmux = <>;
};
def-lvol-io-list {
compatible = "nuvoton,npcx-lvolctrl-def";
/* Put low-voltage io pads into "lvol-io-pads" property if the
* detection level of them is 1.8V, For example, if the bus
* voltage of i2c1_0 port is 1.8V, this property should be:
* lvol-io-pads = <&lvol_io90 &lvol_io87>;
*/
lvol-io-pads = <>;
};
/** Dummy pinctrl node. It will be initialized with defaults based on the SoC series.
* Then, the user can override the pin control options at the board level.
*/