arch/x86: add SSE floating-point to Intel64 subarch

This is a naive implementation which does "eager" context switching
for floating-point context, which, of course, introduces performance
concerns. Other approaches have security concerns, SMP implications,
and impact the x86 arch and Zephyr project as a whole. Discussion is
needed, so punting with the straightforward solution for now.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
This commit is contained in:
Charles E. Youse 2019-07-24 11:40:24 -07:00 committed by Andrew Boie
commit a5eea17dda
7 changed files with 67 additions and 3 deletions

View file

@ -62,4 +62,7 @@
#define _thread_offset_to_r11 \
(___thread_t_arch_OFFSET + ___thread_arch_t_r11_OFFSET)
#define _thread_offset_to_sse \
(___thread_t_arch_OFFSET + ___thread_arch_t_sse_OFFSET)
#endif /* ZEPHYR_ARCH_X86_INCLUDE_INTEL64_OFFSETS_SHORT_ARCH_H_ */