soc: nxp: ke1xf: enable code cache

Add option for enabling the Code Cache present on the NXP Kinetis
KE1xF SoC series and enable it by default.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
This commit is contained in:
Henrik Brix Andersen 2019-05-16 12:40:57 +02:00 committed by Maureen Helm
commit a5e929ab98
4 changed files with 10 additions and 0 deletions

View file

@ -10,6 +10,7 @@ zephyr_library_compile_definitions_ifdef(
CONFIG_PTP_CLOCK_MCUX ENET_ENHANCEDBUFFERDESCRIPTOR_MODE
)
zephyr_sources_ifdef(CONFIG_HAS_MCUX_CACHE fsl_cache.c)
zephyr_sources_ifdef(CONFIG_ADC_MCUX_ADC16 fsl_adc16.c)
zephyr_sources_ifdef(CONFIG_ETH_MCUX fsl_enet.c)
zephyr_sources_ifdef(CONFIG_I2C_MCUX fsl_i2c.c)

View file

@ -13,6 +13,7 @@ config SOC_SERIES_KINETIS_KE1XF
select CPU_HAS_FPU
select CLOCK_CONTROL
select HAS_MCUX
select HAS_MCUX_CACHE
select HAS_MCUX_FTFX
select HAS_MCUX_LPUART
select HAS_MCUX_PCC

View file

@ -87,4 +87,8 @@ config WDOG_INIT
requires that the watchdog be configured during reset
handling.
config KINETIS_KE1XF_ENABLE_CODE_CACHE
bool "Enable the code cache"
default y
endif # SOC_SERIES_KINETIS_KE1XF

View file

@ -12,6 +12,7 @@
#include <device.h>
#include <init.h>
#include <fsl_clock.h>
#include <fsl_cache.h>
#include <cortex_m/exc.h>
/*
@ -241,6 +242,9 @@ static int ke1xf_init(struct device *arg)
*/
NMI_INIT();
#ifdef CONFIG_KINETIS_KE1XF_ENABLE_CODE_CACHE
L1CACHE_EnableCodeCache();
#endif
/* Restore interrupt state */
irq_unlock(old_level);