boards: st: add nucleo_h503rb support
Add board support for nucleo_h503rb. STM32CubeProgrammer and pyocd are supported as runner. The following samples were tested: - samples/hello_world - samples/basic/blinky - samples/basic/button - samples/subsys/task_wdt Signed-off-by: Sandra Schmidt <sandra.schmidt@arrow.com>
This commit is contained in:
Sandra Schmidt
Carles Cufí
parent
7ab625c43b
commit
a5a57d829e
11 changed files with 603 additions and 0 deletions
5
boards/st/nucleo_h503rb/Kconfig.nucleo_h503rb
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boards/st/nucleo_h503rb/Kconfig.nucleo_h503rb
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# Copyright (c) 2024 Arrow Electronics.
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# SPDX-License-Identifier: Apache-2.0
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config BOARD_NUCLEO_H503RB
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select SOC_STM32H503XX
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40
boards/st/nucleo_h503rb/arduino_r3_connector.dtsi
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boards/st/nucleo_h503rb/arduino_r3_connector.dtsi
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/*
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* Copyright (c) 2024 Arrow Electronics.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/ {
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arduino_header: connector {
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compatible = "arduino-header-r3";
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#gpio-cells = <2>;
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gpio-map-mask = <0xffffffff 0xffffffc0>;
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gpio-map-pass-thru = <0 0x3f>;
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gpio-map = <0 0 &gpioa 0 0>, /* A0 */
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<1 0 &gpioa 1 0>, /* A1 */
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<2 0 &gpioa 2 0>, /* A2 */
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<3 0 &gpiob 0 0>, /* A3 */
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<4 0 &gpioc 1 0>, /* A4 */
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<5 0 &gpioc 0 0>, /* A5 */
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<6 0 &gpiob 15 0>, /* D0 */
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<7 0 &gpiob 14 0>, /* D1 */
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<8 0 &gpioa 10 0>, /* D2 */
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<9 0 &gpiob 3 0>, /* D3 */
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<10 0 &gpiob 5 0>, /* D4 */
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<11 0 &gpiob 4 0>, /* D5 */
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<12 0 &gpiob 10 0>, /* D6 */
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<13 0 &gpioa 8 0>, /* D7 */
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<14 0 &gpioc 7 0>, /* D8 */
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<15 0 &gpioc 6 0>, /* D9 */
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<16 0 &gpioc 9 0>, /* D10 */
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<17 0 &gpioa 7 0>, /* D11 */
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<18 0 &gpioa 6 0>, /* D12 */
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<19 0 &gpioa 5 0>, /* D13 */
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<20 0 &gpiob 7 0>, /* D14 */
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<21 0 &gpiob 6 0>; /* D15 */
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};
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};
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arduino_serial: &usart1 {};
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arduino_i2c: &i2c1 {};
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/* arduino_spi (SPI1) uses PA5, to which the user LED is connected */
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14
boards/st/nucleo_h503rb/board.cmake
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14
boards/st/nucleo_h503rb/board.cmake
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# SPDX-License-Identifier: Apache-2.0
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board_runner_args(stm32cubeprogrammer "--port=swd" "--reset-mode=hw")
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board_runner_args(openocd "--tcl-port=6666")
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board_runner_args(openocd --cmd-pre-init "gdb_report_data_abort enable")
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board_runner_args(openocd "--no-halt")
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board_runner_args(pyocd "--target=stm32h503rbtx")
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include(${ZEPHYR_BASE}/boards/common/stm32cubeprogrammer.board.cmake)
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include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake)
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include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
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# FIXME: official openocd runner not yet available.
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8
boards/st/nucleo_h503rb/board.yml
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boards/st/nucleo_h503rb/board.yml
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# Copyright (c) 2024 Arrow Electronics.
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# SPDX-License-Identifier: Apache-2.0
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board:
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name: nucleo_h503rb
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vendor: st
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socs:
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- name: stm32h503xx
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BIN
boards/st/nucleo_h503rb/doc/img/nucleo_h503rb.png
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BIN
boards/st/nucleo_h503rb/doc/img/nucleo_h503rb.png
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Binary file not shown.
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After Width: | Height: | Size: 95 KiB |
287
boards/st/nucleo_h503rb/doc/index.rst
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boards/st/nucleo_h503rb/doc/index.rst
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.. _nucleo_h503rb_board:
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ST Nucleo H503RB
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################
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Overview
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********
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The Nucleo-H503RB board features an ARM |reg| Cortex |reg|-M33 core-based
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STM32H503RBT6 microcontroller with a wide range of connectivity support and
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configurations.
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Here are some highlights of the Nucleo-H503RB board:
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- STM32H503RB microcontroller featuring 128 Kbytes of Flash memory and 32 Kbytes of
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SRAM in LQFP64 package
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- Board connectors:
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- User USB Type-C |reg|
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- MIPI10 for debugging (SWD/JTAG)
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- Arduino |reg| Uno V3 connectivity (CN5, CN6, CN8, CN9)
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- ST morpho extension connector (CN7, CN10)
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- Flexible board power supply:
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- ST-LINK USB VBUS
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- user USB connector
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- external sources
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- On-board ST-LINK/V3EC debugger/programmer:
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- mass storage
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- Virtual COM port
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- debug port
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- One user LED shared with ARDUINO |reg| Uno V3
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- Two push-buttons: USER and RESET
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- 32.768 kHz crystal oscillator
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- 24 MHz HSE crystal oscillator
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More information about the board can be found at the `NUCLEO_H503RB website`_.
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.. image:: img/nucleo_h503rb.png
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:align: center
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:alt: NUCLEO-H503RB
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Hardware
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********
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The STM32H503xx devices are a high-performance microcontrollers family
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(STM32H5 series) based on the high-performance Arm |reg| Cortex |reg|-M33 32-bit
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RISC core. They operate at a frequency of up to 250 MHz.
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- Core: Arm |reg| Cortex |reg|-M33 CPU with FPU, MPU, 375 DMIPS (Dhrystone 2.1),
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and DSP instructions
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- ART Accelerator
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- Memories
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- 128 Kbytes of embedded flash memory with ECC, two banks of read-while-write
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- 2-Kbyte OTP (one-time programmable)
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- 32-Kbyte SRAM with ECC
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- 2 Kbytes of backup SRAM (available in the lowest power modes)
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- Clock management
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- Internal oscillators: 64 MHz HSI, 48 MHz HSI48, 4 MHz CSI, 32 kHz LSI
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- Two PLLs for system clock, USB, audio, and ADC
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- External oscillators: 4 to 50 MHz HSE, 32.768 kHz LSE
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- Embedded regulator (LDO)
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- Up to 49 fast I/Os (most 5 V tolerant), up to 9 I/Os with independent supply down to 1.08 V
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- Analog peripherals
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- 1x 12-bit ADC with up to 2.5 MSPS
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- 1x 12-bit dual-channel DAC
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- 1x ultra-low-power comparator
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- 1x operational amplifier (7 MHz bandwidth)
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- 1x Digital temperature sensor
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- Up to 11 timers
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- 4x 16-bit
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- 1x 32-bit
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- 2x 16-bit low-power 16-bit timers (available in Stop mode)
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- 2x watchdogs
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- 1x SysTick timer
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- RTC with HW calendar, alarms and calibration
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- Up to 16x communication interfaces
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- Up to 2x I2Cs FM + interfaces (SMBus/PMBus |reg|)
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- Up to 2x I3Cs shared with I2C
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- Up to 3x USARTs (ISO7816 interface, LIN, IrDA, modem control)
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- 1x LPUART
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- Up to 3x SPIs including three muxed with full-duplex I2S
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- Up to 3x additional SPI from 3x USART when configured in synchronous mode
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- 1x FDCAN
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- 1x USB 2.0 full-speed host and device
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- Two DMA controllers to offload the CPU
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- Security
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- HASH (SHA-1, SHA-2), HMAC
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- True random generator
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- 96-bit unique ID
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- Active tamper
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- Development support: serial wire debug (SWD) and JTAG interfaces
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More information about STM32H533RE can be found here:
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- `STM32H503rb on www.st.com`_
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- `STM32H503 reference manual`_
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Supported Features
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==================
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The Zephyr nucleo_h503rb board configuration supports the following hardware features:
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+-----------+------------+-------------------------------------+
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| Interface | Controller | Driver/Component |
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+===========+============+=====================================+
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| CLOCK | on-chip | reset and clock control |
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+-----------+------------+-------------------------------------+
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| GPIO | on-chip | gpio |
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+-----------+------------+-------------------------------------+
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| I2C | on-chip | i2c bus |
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+-----------+------------+-------------------------------------+
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| NVIC | on-chip | nested vector interrupt controller |
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+-----------+------------+-------------------------------------+
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| PINMUX | on-chip | pinmux |
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+-----------+------------+-------------------------------------+
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| RNG | on-chip | True Random number generator |
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+-----------+------------+-------------------------------------+
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| UART | on-chip | serial port-polling; |
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| | | serial port-interrupt |
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+-----------+------------+-------------------------------------+
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| WATCHDOG | on-chip | independent watchdog |
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+-----------+------------+-------------------------------------+
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Other hardware features are not yet supported on this Zephyr port.
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The default configuration can be found in the defconfig and dts files:
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- :zephyr_file:`boards/st/nucleo_h503rb/nucleo_h503rb_defconfig`
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- :zephyr_file:`boards/st/nucleo_h503rb/nucleo_h503rb.dts`
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Connections and IOs
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===================
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Nucleo-H503RB board has 8 GPIO controllers. These controllers are responsible for pin muxing,
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input/output, pull-up, etc.
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For more details please refer to `STM32H5 Nucleo-64 board User Manual`_.
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Default Zephyr Peripheral Mapping:
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----------------------------------
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- USART1 TX/RX : PB14/PB15 (Arduino USART1)
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- SPI1 SCK/MISO/MOSI/NSS: PA5/PA6/PA7/PC9
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- USART3 TX/RX : PA3/PA4 (VCP)
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- USER_PB : PC13
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- User LED (green): PA5
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System Clock
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------------
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Nucleo H533RE System Clock could be driven by internal or external oscillator,
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as well as main PLL clock. By default System clock is driven by PLL clock at
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240 MHz, driven by an 24 MHz high-speed external clock.
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Serial Port
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-----------
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Nucleo H533RE board has up to 3 U(S)ARTs. The Zephyr console output is assigned
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to USART3. Default settings are 115200 8N1.
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Programming and Debugging
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*************************
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Applications for the ``nucleo_h503rb`` board can be built and
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flashed in the usual way (see :ref:`build_an_application` and
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:ref:`application_run` for more details).
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OpenOCD Support
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===============
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For now, openocd support for stm32h5 is not available on upstream OpenOCD.
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You can check `OpenOCD official Github mirror`_.
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In order to use it though, you should clone from the cutomized
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`STMicroelectronics OpenOCD Github`_ and compile it following usual README guidelines.
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Once it is done, you can set the OPENOCD and OPENOCD_DEFAULT_PATH variables in
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:zephyr_file:`boards/st/nucleo_h563zi/board.cmake` to point the build
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to the paths of the OpenOCD binary and its scripts, before
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including the common openocd.board.cmake file:
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.. code-block:: none
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set(OPENOCD "<path_to_openocd_repo>/src/openocd" CACHE FILEPATH "" FORCE)
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set(OPENOCD_DEFAULT_PATH <path_to_opneocd_repo>/tcl)
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include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
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Flashing
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========
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Nucleo-H503RB board includes an ST-LINK/V3EC embedded debug tool interface.
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This probe allows to flash the board using various tools.
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Board is configured to be flashed using west STM32CubeProgrammer runner.
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Installation of `STM32CubeProgrammer`_ is then required to flash the board.
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Alternatively, pyocd can also be used to flash and debug the board
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if west is told to use it as runner, which can be done by
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passing ``-r pyocd``.
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For pyocd additional target information needs to be installed.
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This can be done by executing the following commands.
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.. code-block:: console
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$ pyocd pack --update
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$ pyocd pack --install stm32h5
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Alternatively, the openocd interface will be supported by a next openocd version.
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When available, OpenOCD could be used in the same way as other tools.
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Flashing an application to Nucleo-H503RB
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------------------------------------------
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Connect the Nucleo-H503RB to your host computer using the USB port.
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Then build and flash an application. Here is an example for the
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:ref:`hello_world` application.
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Run a serial host program to connect with your Nucleo board:
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.. code-block:: console
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$ minicom -D /dev/ttyACM0
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Then build and flash the application.
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.. zephyr-app-commands::
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:zephyr-app: samples/hello_world
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:board: nucleo_h503rb
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:goals: build flash
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You should see the following message on the console:
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.. code-block:: console
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Hello World! nucleo_h503rb/stm32h503xx
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Debugging
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=========
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You can debug an application in the usual way. Here is an example for the
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:zephyr:code-sample:`blinky` application.
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.. zephyr-app-commands::
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:zephyr-app: samples/basic/blinky
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:board: nucleo_h503rb
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:goals: debug
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.. _NUCLEO_H503RB website:
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https://www.st.com/en/evaluation-tools/nucleo-h503rb
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.. _STM32H5 Nucleo-64 board User Manual:
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https://www.st.com/resource/en/user_manual/um3121-stm32h5-nucleo64-board-mb1814-stmicroelectronics.pdf
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.. _STM32H503RB on www.st.com:
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https://www.st.com/en/microcontrollers-microprocessors/stm32h503rb
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.. _STM32H503 reference manual:
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https://www.st.com/resource/en/reference_manual/rm0492-stm32h503-line-armbased-32bit-mcus-stmicroelectronics.pdf
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.. _STM32CubeProgrammer:
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https://www.st.com/en/development-tools/stm32cubeprog.html
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.. _OpenOCD official Github mirror:
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https://github.com/openocd-org/openocd/
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.. _STMicroelectronics OpenOCD Github:
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https://github.com/STMicroelectronics/OpenOCD/tree/openocd-cubeide-r6
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116
boards/st/nucleo_h503rb/nucleo_h503rb.dts
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116
boards/st/nucleo_h503rb/nucleo_h503rb.dts
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@ -0,0 +1,116 @@
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/*
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* Copyright (c) 2024 Arrow Electronics.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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#include <st/h5/stm32h503Xb.dtsi>
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#include <st/h5/stm32h503rbtx-pinctrl.dtsi>
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#include "arduino_r3_connector.dtsi"
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#include "st_morpho_connector.dtsi"
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#include <zephyr/dt-bindings/input/input-event-codes.h>
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/ {
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model = "STMicroelectronics STM32H503RB-NUCLEO board";
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compatible = "st,stm32h503rb-nucleo";
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#address-cells = <1>;
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#size-cells = <1>;
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chosen {
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zephyr,console = &usart3;
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zephyr,shell-uart = &usart3;
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zephyr,sram = &sram0;
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zephyr,flash = &flash0;
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};
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leds: leds {
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compatible = "gpio-leds";
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green_led_2: led_2 {
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gpios = <&gpioa 5 GPIO_ACTIVE_HIGH>;
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label = "User LD2";
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};
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};
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gpio_keys {
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compatible = "gpio-keys";
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user_button: button {
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label = "User";
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gpios = <&gpioc 13 GPIO_ACTIVE_HIGH>;
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zephyr,code = <INPUT_KEY_0>;
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};
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};
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aliases {
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led0 = &green_led_2;
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sw0 = &user_button;
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watchdog0 = &iwdg;
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};
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};
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&clk_csi {
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status = "okay";
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};
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&clk_hsi {
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status = "okay";
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};
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&clk_hsi48 {
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status = "okay";
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};
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&clk_hse {
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clock-frequency = <DT_FREQ_M(24)>;
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status = "okay";
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};
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&pll {
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div-m = <2>;
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mul-n = <40>;
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div-p = <2>;
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div-q = <2>;
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div-r = <2>;
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clocks = <&clk_hse>;
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status = "okay";
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};
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&rcc {
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clocks = <&pll>;
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clock-frequency = <DT_FREQ_M(240)>;
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ahb-prescaler = <1>;
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apb1-prescaler = <1>;
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apb2-prescaler = <1>;
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apb3-prescaler = <1>;
|
||||
};
|
||||
|
||||
&usart1 {
|
||||
pinctrl-0 = <&usart1_tx_pb14 &usart1_rx_pb15>;
|
||||
pinctrl-names = "default";
|
||||
current-speed = <115200>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usart3 {
|
||||
pinctrl-0 = <&usart3_tx_pa4 &usart3_rx_pa3>;
|
||||
pinctrl-names = "default";
|
||||
current-speed = <115200>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&rng {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&iwdg {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
pinctrl-0 = <&i2c1_scl_pb6 &i2c1_sda_pb7>;
|
||||
pinctrl-names = "default";
|
||||
clock-frequency = <I2C_BITRATE_FAST>;
|
||||
status = "okay";
|
||||
};
|
||||
16
boards/st/nucleo_h503rb/nucleo_h503rb.yaml
Normal file
16
boards/st/nucleo_h503rb/nucleo_h503rb.yaml
Normal file
|
|
@ -0,0 +1,16 @@
|
|||
identifier: nucleo_h503rb
|
||||
name: ST Nucleo H503RB
|
||||
type: mcu
|
||||
arch: arm
|
||||
toolchain:
|
||||
- zephyr
|
||||
ram: 32
|
||||
flash: 128
|
||||
supported:
|
||||
- arduino_gpio
|
||||
- arduino_serial
|
||||
- gpio
|
||||
- uart
|
||||
- i2c
|
||||
- watchdog
|
||||
vendor: st
|
||||
24
boards/st/nucleo_h503rb/nucleo_h503rb_defconfig
Normal file
24
boards/st/nucleo_h503rb/nucleo_h503rb_defconfig
Normal file
|
|
@ -0,0 +1,24 @@
|
|||
# Copyright (c) 2024 Arrow Electronics.
|
||||
# SPDX-License-Identifier: Apache-2.0
|
||||
|
||||
# enable uart driver
|
||||
CONFIG_SERIAL=y
|
||||
|
||||
# console
|
||||
CONFIG_CONSOLE=y
|
||||
CONFIG_UART_CONSOLE=y
|
||||
|
||||
# Enable clock
|
||||
CONFIG_CLOCK_CONTROL=y
|
||||
|
||||
# Enable MPU
|
||||
CONFIG_ARM_MPU=y
|
||||
|
||||
# Enable HW stack protection
|
||||
CONFIG_HW_STACK_PROTECTION=y
|
||||
|
||||
# enable GPIO
|
||||
CONFIG_GPIO=y
|
||||
|
||||
# enable pin controller
|
||||
CONFIG_PINCTRL=y
|
||||
70
boards/st/nucleo_h503rb/st_morpho_connector.dtsi
Normal file
70
boards/st/nucleo_h503rb/st_morpho_connector.dtsi
Normal file
|
|
@ -0,0 +1,70 @@
|
|||
/*
|
||||
* Copyright (c) 2024 Arrow Electronics.
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#include <zephyr/dt-bindings/gpio/gpio.h>
|
||||
#include <zephyr/dt-bindings/gpio/st-morpho-header.h>
|
||||
|
||||
/ {
|
||||
st_morpho_header: st-morpho-header {
|
||||
compatible = "st-morpho-header";
|
||||
#gpio-cells = <2>;
|
||||
gpio-map-mask = <ST_MORPHO_PIN_MASK 0x0>;
|
||||
gpio-map-pass-thru = <0x0 GPIO_DT_FLAGS_MASK>;
|
||||
gpio-map = <ST_MORPHO_L_1 0 &gpioc 10 0>,
|
||||
<ST_MORPHO_L_2 0 &gpioc 11 0>,
|
||||
<ST_MORPHO_L_3 0 &gpioc 12 0>,
|
||||
<ST_MORPHO_L_4 0 &gpiod 2 0>,
|
||||
/* By default, PA13 and PA14 are used as SWD signals
|
||||
* (SB40=ON, SB41=ON)
|
||||
*/
|
||||
<ST_MORPHO_L_13 0 &gpioa 13 0>,
|
||||
<ST_MORPHO_L_15 0 &gpioa 14 0>,
|
||||
<ST_MORPHO_L_17 0 &gpioa 15 0>,
|
||||
<ST_MORPHO_L_23 0 &gpioc 13 0>,
|
||||
<ST_MORPHO_L_25 0 &gpioc 14 0>,
|
||||
<ST_MORPHO_L_27 0 &gpioc 15 0>,
|
||||
<ST_MORPHO_L_28 0 &gpioa 0 0>,
|
||||
/* STM32H503xx has no pin PF0 as described in manual (UM3121) */
|
||||
<ST_MORPHO_L_30 0 &gpioa 1 0>,
|
||||
/* STM32H503xx has no pin PF1 as described in manual (UM3121) */
|
||||
<ST_MORPHO_L_32 0 &gpioa 2 0>,
|
||||
<ST_MORPHO_L_34 0 &gpiob 0 0>,
|
||||
<ST_MORPHO_L_35 0 &gpioc 2 0>,
|
||||
<ST_MORPHO_L_36 0 &gpioc 1 0>,
|
||||
<ST_MORPHO_L_37 0 &gpioc 3 0>,
|
||||
<ST_MORPHO_L_38 0 &gpioc 0 0>,
|
||||
|
||||
<ST_MORPHO_R_2 0 &gpioc 8 0>,
|
||||
<ST_MORPHO_R_3 0 &gpiob 6 0>,
|
||||
<ST_MORPHO_R_5 0 &gpiob 7 0>,
|
||||
<ST_MORPHO_R_6 0 &gpioc 5 0>,
|
||||
<ST_MORPHO_R_11 0 &gpioa 5 0>,
|
||||
/* By default, connected to USB connector (SB13=ON, SB17=ON) */
|
||||
<ST_MORPHO_R_12 0 &gpioa 12 0>,
|
||||
<ST_MORPHO_R_13 0 &gpioa 6 0>,
|
||||
/* By default, connected to USB connector (SB13=ON, SB17=ON) */
|
||||
<ST_MORPHO_R_14 0 &gpioa 11 0>,
|
||||
<ST_MORPHO_R_15 0 &gpioa 7 0>,
|
||||
<ST_MORPHO_R_16 0 &gpiob 12 0>,
|
||||
<ST_MORPHO_R_17 0 &gpioc 9 0>,
|
||||
<ST_MORPHO_R_19 0 &gpioc 6 0>,
|
||||
<ST_MORPHO_R_21 0 &gpioc 7 0>,
|
||||
<ST_MORPHO_R_22 0 &gpiob 2 0>,
|
||||
<ST_MORPHO_R_23 0 &gpioa 8 0>,
|
||||
<ST_MORPHO_R_24 0 &gpiob 1 0>,
|
||||
<ST_MORPHO_R_25 0 &gpiob 10 0>,
|
||||
<ST_MORPHO_R_26 0 &gpiob 15 0>,
|
||||
<ST_MORPHO_R_27 0 &gpiob 4 0>,
|
||||
<ST_MORPHO_R_28 0 &gpiob 14 0>,
|
||||
<ST_MORPHO_R_29 0 &gpiob 5 0>,
|
||||
<ST_MORPHO_R_30 0 &gpiob 13 0>,
|
||||
<ST_MORPHO_R_31 0 &gpiob 3 0>,
|
||||
<ST_MORPHO_R_33 0 &gpioa 10 0>,
|
||||
<ST_MORPHO_R_34 0 &gpioc 4 0>,
|
||||
<ST_MORPHO_R_35 0 &gpiob 14 0>,
|
||||
<ST_MORPHO_R_36 0 &gpiob 8 0>,
|
||||
<ST_MORPHO_R_37 0 &gpiob 15 0>;
|
||||
};
|
||||
};
|
||||
23
boards/st/nucleo_h503rb/support/openocd.cfg
Normal file
23
boards/st/nucleo_h503rb/support/openocd.cfg
Normal file
|
|
@ -0,0 +1,23 @@
|
|||
source [find interface/stlink-dap.cfg]
|
||||
|
||||
source [find target/stm32h5x.cfg]
|
||||
|
||||
transport select "dapdirect_swd"
|
||||
|
||||
set CHIPNAME STM32H503RBTX
|
||||
set BOARDNAME NUCLEO-STM32H503RB
|
||||
|
||||
# Reset configuration
|
||||
# use hardware reset, connect under reset
|
||||
# connect_assert_srst needed if low power mode application running (WFI...)
|
||||
reset_config srst_only srst_nogate connect_assert_srst
|
||||
set CONNECT_UNDER_RESET 1
|
||||
set CORE_RESET 0
|
||||
|
||||
# Due to the use of connect_assert_srst, running gdb requires
|
||||
# to reset halt just after openocd init.
|
||||
rename init old_init
|
||||
proc init {} {
|
||||
old_init
|
||||
reset halt
|
||||
}
|
||||
Loading…
Add table
Add a link
Reference in a new issue