driver: uart: make deprecation effective
Several macros were documented as deprecated but lacked the infrastructure to produce deprecation warnings. Add the deprecation marker, and fix the in-tree references to the deprecated spellings. Note that one non-deprecated macro should have been deprecated, and is, referring to a newly added line control bit. Signed-off-by: Peter A. Bigot <pab@pabigot.com>
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10 changed files with 34 additions and 32 deletions
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@ -599,7 +599,7 @@ static int uart_console_init(struct device *arg)
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while (1) {
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while (1) {
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u32_t dtr = 0U;
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u32_t dtr = 0U;
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uart_line_ctrl_get(uart_console_dev, LINE_CTRL_DTR, &dtr);
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uart_line_ctrl_get(uart_console_dev, UART_LINE_CTRL_DTR, &dtr);
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if (dtr) {
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if (dtr) {
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break;
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break;
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}
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}
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@ -120,7 +120,7 @@ static int uart_cc32xx_err_check(struct device *dev)
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/* Map cc32xx SDK uart.h defines to zephyr uart.h defines */
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/* Map cc32xx SDK uart.h defines to zephyr uart.h defines */
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z_err = ((cc32xx_errs & UART_RXERROR_OVERRUN) ?
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z_err = ((cc32xx_errs & UART_RXERROR_OVERRUN) ?
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UART_ERROR_OVERRUN : 0) |
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UART_ERROR_OVERRUN : 0) |
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((cc32xx_errs & UART_RXERROR_BREAK) ? UART_ERROR_BREAK : 0) |
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((cc32xx_errs & UART_RXERROR_BREAK) ? UART_BREAK : 0) |
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((cc32xx_errs & UART_RXERROR_PARITY) ? UART_ERROR_PARITY : 0) |
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((cc32xx_errs & UART_RXERROR_PARITY) ? UART_ERROR_PARITY : 0) |
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((cc32xx_errs & UART_RXERROR_FRAMING) ? UART_ERROR_FRAMING : 0);
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((cc32xx_errs & UART_RXERROR_FRAMING) ? UART_ERROR_FRAMING : 0);
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@ -451,7 +451,7 @@ static void uart_ns16550_poll_out(struct device *dev,
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* @param dev UART device struct
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* @param dev UART device struct
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*
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*
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* @return one of UART_ERROR_OVERRUN, UART_ERROR_PARITY, UART_ERROR_FRAMING,
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* @return one of UART_ERROR_OVERRUN, UART_ERROR_PARITY, UART_ERROR_FRAMING,
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* UART_ERROR_BREAK if an error was detected, 0 otherwise.
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* UART_BREAK if an error was detected, 0 otherwise.
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*/
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*/
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static int uart_ns16550_err_check(struct device *dev)
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static int uart_ns16550_err_check(struct device *dev)
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{
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{
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@ -691,15 +691,15 @@ static int uart_ns16550_line_ctrl_set(struct device *dev,
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u32_t mdc, chg;
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u32_t mdc, chg;
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switch (ctrl) {
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switch (ctrl) {
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case LINE_CTRL_BAUD_RATE:
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case UART_LINE_CTRL_BAUD_RATE:
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set_baud_rate(dev, val);
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set_baud_rate(dev, val);
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return 0;
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return 0;
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case LINE_CTRL_RTS:
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case UART_LINE_CTRL_RTS:
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case LINE_CTRL_DTR:
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case UART_LINE_CTRL_DTR:
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mdc = INBYTE(MDC(dev));
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mdc = INBYTE(MDC(dev));
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if (ctrl == LINE_CTRL_RTS) {
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if (ctrl == UART_LINE_CTRL_RTS) {
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chg = MCR_RTS;
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chg = MCR_RTS;
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} else {
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} else {
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chg = MCR_DTR;
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chg = MCR_DTR;
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@ -31,6 +31,7 @@ extern "C" {
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/** @brief Line control signals. */
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/** @brief Line control signals. */
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enum uart_line_ctrl {
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enum uart_line_ctrl {
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UART_LINE_CTRL_BAUD_RATE = BIT(0),
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UART_LINE_CTRL_RTS = BIT(1),
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UART_LINE_CTRL_RTS = BIT(1),
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UART_LINE_CTRL_DTR = BIT(2),
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UART_LINE_CTRL_DTR = BIT(2),
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UART_LINE_CTRL_DCD = BIT(3),
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UART_LINE_CTRL_DCD = BIT(3),
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@ -157,13 +158,14 @@ enum uart_rx_stop_reason {
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UART_BREAK = (1 << 3),
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UART_BREAK = (1 << 3),
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};
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};
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/** @brief Backward compatibility defines, deprecated */
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/** @brief Backward compatibility defines, deprecated */
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#define UART_ERROR_BREAK UART_BREAK
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#define UART_ERROR_BREAK __DEPRECATED_MACRO UART_BREAK
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#define LINE_CTRL_BAUD_RATE (1 << 0)
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#define LINE_CTRL_BAUD_RATE __DEPRECATED_MACRO UART_LINE_CTRL_BAUD_RATE
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#define LINE_CTRL_RTS UART_LINE_CTRL_RTS
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#define LINE_CTRL_RTS __DEPRECATED_MACRO UART_LINE_CTRL_RTS
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#define LINE_CTRL_DTR UART_LINE_CTRL_DTR
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#define LINE_CTRL_DTR __DEPRECATED_MACRO UART_LINE_CTRL_DTR
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#define LINE_CTRL_DCD UART_LINE_CTRL_DCD
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#define LINE_CTRL_DCD __DEPRECATED_MACRO UART_LINE_CTRL_DCD
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#define LINE_CTRL_DSR UART_LINE_CTRL_DSR
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#define LINE_CTRL_DSR __DEPRECATED_MACRO UART_LINE_CTRL_DSR
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/** @brief UART TX event data. */
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/** @brief UART TX event data. */
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@ -73,9 +73,9 @@
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#define SET_CONTROL_LINE_STATE_DTR 0x01
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#define SET_CONTROL_LINE_STATE_DTR 0x01
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/** Enhance enum uart_line_ctrl with CDC specific values */
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/** Enhance enum uart_line_ctrl with CDC specific values */
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#define USB_CDC_LINE_CTRL_BAUD_RATE LINE_CTRL_BAUD_RATE
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#define USB_CDC_LINE_CTRL_BAUD_RATE UART_LINE_CTRL_BAUD_RATE
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#define USB_CDC_LINE_CTRL_DCD LINE_CTRL_DCD
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#define USB_CDC_LINE_CTRL_DCD UART_LINE_CTRL_DCD
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#define USB_CDC_LINE_CTRL_DSR LINE_CTRL_DSR
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#define USB_CDC_LINE_CTRL_DSR UART_LINE_CTRL_DSR
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#define USB_CDC_LINE_CTRL_BREAK BIT(5)
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#define USB_CDC_LINE_CTRL_BREAK BIT(5)
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#define USB_CDC_LINE_CTRL_RING_SIGNAL BIT(6)
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#define USB_CDC_LINE_CTRL_RING_SIGNAL BIT(6)
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#define USB_CDC_LINE_CTRL_FRAMING BIT(7)
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#define USB_CDC_LINE_CTRL_FRAMING BIT(7)
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@ -574,7 +574,7 @@ void main(void)
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LOG_DBG("Wait for DTR");
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LOG_DBG("Wait for DTR");
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while (1) {
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while (1) {
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uart_line_ctrl_get(dev, LINE_CTRL_DTR, &dtr);
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uart_line_ctrl_get(dev, UART_LINE_CTRL_DTR, &dtr);
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if (dtr) {
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if (dtr) {
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break;
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break;
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}
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}
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@ -584,7 +584,7 @@ void main(void)
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LOG_DBG("DTR set, continue");
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LOG_DBG("DTR set, continue");
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ret = uart_line_ctrl_get(dev, LINE_CTRL_BAUD_RATE, &baudrate);
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ret = uart_line_ctrl_get(dev, UART_LINE_CTRL_BAUD_RATE, &baudrate);
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if (ret) {
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if (ret) {
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printk("Failed to get baudrate, ret code %d\n", ret);
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printk("Failed to get baudrate, ret code %d\n", ret);
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} else {
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} else {
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@ -86,7 +86,7 @@ void main(void)
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LOG_INF("Wait for DTR");
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LOG_INF("Wait for DTR");
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while (true) {
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while (true) {
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uart_line_ctrl_get(dev, LINE_CTRL_DTR, &dtr);
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uart_line_ctrl_get(dev, UART_LINE_CTRL_DTR, &dtr);
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if (dtr) {
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if (dtr) {
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break;
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break;
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} else {
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} else {
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@ -98,12 +98,12 @@ void main(void)
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LOG_INF("DTR set");
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LOG_INF("DTR set");
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/* They are optional, we use them to test the interrupt endpoint */
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/* They are optional, we use them to test the interrupt endpoint */
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ret = uart_line_ctrl_set(dev, LINE_CTRL_DCD, 1);
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ret = uart_line_ctrl_set(dev, UART_LINE_CTRL_DCD, 1);
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if (ret) {
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if (ret) {
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LOG_WRN("Failed to set DCD, ret code %d", ret);
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LOG_WRN("Failed to set DCD, ret code %d", ret);
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}
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}
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ret = uart_line_ctrl_set(dev, LINE_CTRL_DSR, 1);
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ret = uart_line_ctrl_set(dev, UART_LINE_CTRL_DSR, 1);
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if (ret) {
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if (ret) {
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LOG_WRN("Failed to set DSR, ret code %d", ret);
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LOG_WRN("Failed to set DSR, ret code %d", ret);
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}
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}
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@ -111,7 +111,7 @@ void main(void)
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/* Wait 1 sec for the host to do all settings */
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/* Wait 1 sec for the host to do all settings */
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k_busy_wait(1000000);
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k_busy_wait(1000000);
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ret = uart_line_ctrl_get(dev, LINE_CTRL_BAUD_RATE, &baudrate);
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ret = uart_line_ctrl_get(dev, UART_LINE_CTRL_BAUD_RATE, &baudrate);
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if (ret) {
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if (ret) {
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LOG_WRN("Failed to get baudrate, ret code %d", ret);
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LOG_WRN("Failed to get baudrate, ret code %d", ret);
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} else {
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} else {
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@ -88,12 +88,12 @@ static void uart_line_set(struct device *dev)
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int ret;
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int ret;
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/* They are optional, we use them to test the interrupt endpoint */
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/* They are optional, we use them to test the interrupt endpoint */
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ret = uart_line_ctrl_set(dev, LINE_CTRL_DCD, 1);
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ret = uart_line_ctrl_set(dev, UART_LINE_CTRL_DCD, 1);
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if (ret) {
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if (ret) {
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LOG_DBG("Failed to set DCD, ret code %d", ret);
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LOG_DBG("Failed to set DCD, ret code %d", ret);
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}
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}
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ret = uart_line_ctrl_set(dev, LINE_CTRL_DSR, 1);
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ret = uart_line_ctrl_set(dev, UART_LINE_CTRL_DSR, 1);
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if (ret) {
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if (ret) {
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LOG_DBG("Failed to set DSR, ret code %d", ret);
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LOG_DBG("Failed to set DSR, ret code %d", ret);
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}
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}
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@ -101,7 +101,7 @@ static void uart_line_set(struct device *dev)
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/* Wait 1 sec for the host to do all settings */
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/* Wait 1 sec for the host to do all settings */
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k_busy_wait(1000000);
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k_busy_wait(1000000);
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ret = uart_line_ctrl_get(dev, LINE_CTRL_BAUD_RATE, &baudrate);
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ret = uart_line_ctrl_get(dev, UART_LINE_CTRL_BAUD_RATE, &baudrate);
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if (ret) {
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if (ret) {
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LOG_DBG("Failed to get baudrate, ret code %d", ret);
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LOG_DBG("Failed to get baudrate, ret code %d", ret);
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} else {
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} else {
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@ -131,7 +131,7 @@ void main(void)
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LOG_INF("Wait for DTR");
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LOG_INF("Wait for DTR");
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while (1) {
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while (1) {
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uart_line_ctrl_get(dev0, LINE_CTRL_DTR, &dtr);
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uart_line_ctrl_get(dev0, UART_LINE_CTRL_DTR, &dtr);
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if (dtr) {
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if (dtr) {
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break;
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break;
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}
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}
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@ -140,7 +140,7 @@ void main(void)
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}
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}
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while (1) {
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while (1) {
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uart_line_ctrl_get(dev1, LINE_CTRL_DTR, &dtr);
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uart_line_ctrl_get(dev1, UART_LINE_CTRL_DTR, &dtr);
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if (dtr) {
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if (dtr) {
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break;
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break;
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}
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}
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@ -627,7 +627,7 @@ void main(void)
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LOG_INF("Wait for DTR on CDC ACM 0");
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LOG_INF("Wait for DTR on CDC ACM 0");
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while (1) {
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while (1) {
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uart_line_ctrl_get(cdc0_dev, LINE_CTRL_DTR, &dtr);
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uart_line_ctrl_get(cdc0_dev, UART_LINE_CTRL_DTR, &dtr);
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if (dtr) {
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if (dtr) {
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break;
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break;
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}
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}
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@ -636,7 +636,7 @@ void main(void)
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LOG_INF("Wait for DTR on CDC ACM 1");
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LOG_INF("Wait for DTR on CDC ACM 1");
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while (1) {
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while (1) {
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uart_line_ctrl_get(cdc1_dev, LINE_CTRL_DTR, &dtr);
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uart_line_ctrl_get(cdc1_dev, UART_LINE_CTRL_DTR, &dtr);
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if (dtr) {
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if (dtr) {
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break;
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break;
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}
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}
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@ -885,14 +885,14 @@ static int cdc_acm_line_ctrl_get(struct device *dev,
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struct cdc_acm_dev_data_t * const dev_data = DEV_DATA(dev);
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struct cdc_acm_dev_data_t * const dev_data = DEV_DATA(dev);
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switch (ctrl) {
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switch (ctrl) {
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case LINE_CTRL_BAUD_RATE:
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case UART_LINE_CTRL_BAUD_RATE:
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*val = sys_le32_to_cpu(dev_data->line_coding.dwDTERate);
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*val = sys_le32_to_cpu(dev_data->line_coding.dwDTERate);
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return 0;
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return 0;
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case LINE_CTRL_RTS:
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case UART_LINE_CTRL_RTS:
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*val = (dev_data->line_state &
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*val = (dev_data->line_state &
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SET_CONTROL_LINE_STATE_RTS) ? 1 : 0;
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SET_CONTROL_LINE_STATE_RTS) ? 1 : 0;
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return 0;
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return 0;
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case LINE_CTRL_DTR:
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case UART_LINE_CTRL_DTR:
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*val = (dev_data->line_state &
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*val = (dev_data->line_state &
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SET_CONTROL_LINE_STATE_DTR) ? 1 : 0;
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SET_CONTROL_LINE_STATE_DTR) ? 1 : 0;
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return 0;
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return 0;
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