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drivers: pinctrl: Update ambiq nce definitions in pinctrl

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Updated nce definitions in pinctrl structure to be consistent
with ambiq HAL.

Signed-off-by: Hao Luo <hluo@ambiq.com>
This commit is contained in:
Hao Luo 2025-04-14 20:23:17 +08:00 • committed by Benjamin Cabé
commit a499afde23
10 changed files with 42 additions and 43 deletions
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2
boards/ambiq/apollo3_evb/apollo3_evb-pinctrl.dtsi
View file

@ -125,7 +125,7 @@
pinmux = <NCE19_P19>; pinmux = <NCE19_P19>;
drive-push-pull; drive-push-pull;
drive-strength = "0.5"; drive-strength = "0.5";
ambiq,iom-nce-module = <0>; ambiq,nce-src = <0>;
ambiq,iom-num = <6>; ambiq,iom-num = <6>;
}; };
}; };

6
boards/ambiq/apollo3p_evb/apollo3p_evb-pinctrl.dtsi
View file

@ -126,7 +126,7 @@
drive-push-pull; drive-push-pull;
drive-strength = "0.5"; drive-strength = "0.5";
ambiq,iom-mspi = <0>; ambiq,iom-mspi = <0>;
ambiq,iom-nce-module = <0>; ambiq,nce-src = <0>;
ambiq,iom-num = <0>; ambiq,iom-num = <0>;
}; };
}; };
@ -147,7 +147,7 @@
drive-push-pull; drive-push-pull;
drive-strength = "0.5"; drive-strength = "0.5";
ambiq,iom-mspi = <0>; ambiq,iom-mspi = <0>;
ambiq,iom-nce-module = <0>; ambiq,nce-src = <0>;
ambiq,iom-num = <1>; ambiq,iom-num = <1>;
}; };
}; };
@ -164,7 +164,7 @@
drive-push-pull; drive-push-pull;
drive-strength = "0.5"; drive-strength = "0.5";
ambiq,iom-mspi = <0>; ambiq,iom-mspi = <0>;
ambiq,iom-nce-module = <0>; ambiq,nce-src = <0>;
ambiq,iom-num = <2>; ambiq,iom-num = <2>;
}; };
}; };

6
boards/ambiq/apollo4p_blue_kxr_evb/apollo4p_blue_kxr_evb-pinctrl.dtsi
View file

@ -128,7 +128,7 @@
pinmux = <NCE57_P57>; pinmux = <NCE57_P57>;
drive-push-pull; drive-push-pull;
drive-strength = "0.5"; drive-strength = "0.5";
ambiq,iom-nce-module = <32>; ambiq,nce-src = <32>;
}; };
}; };
mspi1_default: mspi1_default{ mspi1_default: mspi1_default{
@ -141,7 +141,7 @@
pinmux = <NCE56_P56>; pinmux = <NCE56_P56>;
drive-push-pull; drive-push-pull;
drive-strength = "0.5"; drive-strength = "0.5";
ambiq,iom-nce-module = <34>; ambiq,nce-src = <34>;
}; };
}; };
mspi2_default: mspi2_default{ mspi2_default: mspi2_default{
@ -154,7 +154,7 @@
pinmux = <NCE52_P52>; pinmux = <NCE52_P52>;
drive-push-pull; drive-push-pull;
drive-strength = "0.5"; drive-strength = "0.5";
ambiq,iom-nce-module = <36>; ambiq,nce-src = <36>;
}; };
}; };

6
boards/ambiq/apollo4p_evb/apollo4p_evb-pinctrl.dtsi
View file

@ -142,7 +142,7 @@
pinmux = <NCE57_P57>; pinmux = <NCE57_P57>;
drive-push-pull; drive-push-pull;
drive-strength = "0.5"; drive-strength = "0.5";
ambiq,iom-nce-module = <32>; ambiq,nce-src = <32>;
}; };
}; };
mspi1_default: mspi1_default{ mspi1_default: mspi1_default{
@ -155,7 +155,7 @@
pinmux = <NCE56_P56>; pinmux = <NCE56_P56>;
drive-push-pull; drive-push-pull;
drive-strength = "0.5"; drive-strength = "0.5";
ambiq,iom-nce-module = <34>; ambiq,nce-src = <34>;
}; };
}; };
mspi2_default: mspi2_default{ mspi2_default: mspi2_default{
@ -168,7 +168,7 @@
pinmux = <NCE0_P0>; pinmux = <NCE0_P0>;
drive-push-pull; drive-push-pull;
drive-strength = "0.5"; drive-strength = "0.5";
ambiq,iom-nce-module = <36>; ambiq,nce-src = <36>;
}; };
}; };
sdio0_default: sdio0_default { sdio0_default: sdio0_default {

2
boards/rakwireless/rak11720/rak11720_apollo3-pinctrl.dtsi
View file

@ -108,7 +108,7 @@
pinmux = <NCE19_P19>; pinmux = <NCE19_P19>;
drive-push-pull; drive-push-pull;
drive-strength = "0.5"; drive-strength = "0.5";
ambiq,iom-nce-module = <0>; ambiq,nce-src = <0>;
ambiq,iom-num = <6>; ambiq,iom-num = <6>;
}; };
}; };

9
drivers/pinctrl/pinctrl_ambiq.c
View file

@ -22,7 +22,8 @@ static void pinctrl_configure_pin(const pinctrl_soc_pin_t *pin)
: pin->tristate ? AM_HAL_GPIO_PIN_OUTCFG_TRISTATE : pin->tristate ? AM_HAL_GPIO_PIN_OUTCFG_TRISTATE
: AM_HAL_GPIO_PIN_OUTCFG_DISABLE; : AM_HAL_GPIO_PIN_OUTCFG_DISABLE;
pin_config.eDriveStrength = pin->drive_strength; pin_config.eDriveStrength = pin->drive_strength;
pin_config.uNCE = pin->iom_nce; pin_config.uNCE = pin->nce;
pin_config.eCEpol = pin->nce_pol;
#if defined(CONFIG_SOC_APOLLO3P_BLUE) #if defined(CONFIG_SOC_APOLLO3P_BLUE)
pin_config.bIomMSPIn = pin->iom_mspi; pin_config.bIomMSPIn = pin->iom_mspi;
#endif #endif
@ -42,9 +43,11 @@ static void pinctrl_configure_pin(const pinctrl_soc_pin_t *pin)
: pin->tristate ? AM_HAL_GPIO_PIN_OUTCFG_TRISTATE : pin->tristate ? AM_HAL_GPIO_PIN_OUTCFG_TRISTATE
: AM_HAL_GPIO_PIN_OUTCFG_DISABLE; : AM_HAL_GPIO_PIN_OUTCFG_DISABLE;
pin_config.GP.cfg_b.eDriveStrength = pin->drive_strength; pin_config.GP.cfg_b.eDriveStrength = pin->drive_strength;
#if defined(CONFIG_SOC_SERIES_APOLLO4X)
pin_config.GP.cfg_b.uSlewRate = pin->slew_rate; pin_config.GP.cfg_b.uSlewRate = pin->slew_rate;
pin_config.GP.cfg_b.uNCE = pin->iom_nce; #endif
pin_config.GP.cfg_b.eIntDir = pin->interrupt_direction; pin_config.GP.cfg_b.uNCE = pin->nce;
pin_config.GP.cfg_b.eCEpol = pin->nce_pol;
if (pin->bias_pull_up) { if (pin->bias_pull_up) {
pin_config.GP.cfg_b.ePullup = pin->ambiq_pull_up_ohms + AM_HAL_GPIO_PIN_PULLUP_1_5K; pin_config.GP.cfg_b.ePullup = pin->ambiq_pull_up_ohms + AM_HAL_GPIO_PIN_PULLUP_1_5K;

9
dts/bindings/pinctrl/ambiq,apollo3-pinctrl.yaml
View file

@ -98,7 +98,7 @@ child-binding:
For Apollo3 these pins are 0-1,5-6,8-9,25,27,39-40,42-43,48-49. For Apollo3 these pins are 0-1,5-6,8-9,25,27,39-40,42-43,48-49.
The default value is 1500 ohms, which is the reset value of The default value is 1500 ohms, which is the reset value of
register PADREGx.PADxRSEL. register PADREGx.PADxRSEL.
ambiq,iom-nce-module: ambiq,nce-src:
type: int type: int
default: 0 default: 0
description: | description: |
@ -125,3 +125,10 @@ child-binding:
information and config the pins accordingly, we give a default value information and config the pins accordingly, we give a default value
0 here to make it be consistent with AM_HAL_GPIO_PINCFG_DEFAULT in 0 here to make it be consistent with AM_HAL_GPIO_PINCFG_DEFAULT in
ambiq hal. If the pin is not a CE, this descriptor will be ignored. ambiq hal. If the pin is not a CE, this descriptor will be ignored.
ambiq,nce-pol:
type: int
default: 0
description: |
Polarity select for NCE
LOW = 0x0 - Polarity is active low
HIGH = 0x1 - Polarity is active high

24
dts/bindings/pinctrl/ambiq,apollo4-pinctrl.yaml
View file

@ -104,7 +104,7 @@ child-binding:
default: 1500 default: 1500
description: | description: |
The pullup resistor value. The default value is 1500 ohms. The pullup resistor value. The default value is 1500 ohms.
ambiq,iom-nce-module: ambiq,nce-src:
type: int type: int
default: 0 default: 0
description: | description: |
@ -154,24 +154,10 @@ child-binding:
42, DC_RESX : DC module RESX 42, DC_RESX : DC module RESX
If the pin is not a CE, this descriptor will be ignored. If the pin is not a CE, this descriptor will be ignored.
Default value 0, which is the reset value. Default value 0, which is the reset value.
ambiq,iom-mspi: ambiq,nce-pol:
type: int type: int
default: 0 default: 0
description: | description: |
Indicates the module which uses specific CE pin, 1 if CE is IOM, 0 if MSPI. Polarity select for NCE
Default value 0, which is the reset value. LOW = 0x0 - Polarity is active low
If the pin is not a CE, this descriptor will be ignored. HIGH = 0x1 - Polarity is active high
ambiq,iom-num:
type: int
default: 0
description: |
Indicates the instance which uses specific CE pin.
IOM number (0-7) or MSPI (0-2).
Default value 0, which is the reset value.
If the pin is not a CE, this descriptor will be ignored.
ambiq,interrupt-direction:
type: int
default: 0
description: |
Indicates the pininterrupt direction.
Default value 0, which is the reset value.

9
soc/ambiq/apollo3x/pinctrl_soc.h
View file

@ -33,12 +33,14 @@ struct apollo3_pinctrl_soc_pin {
uint32_t bias_pull_down: 1; uint32_t bias_pull_down: 1;
/** pullup resistor value */ /** pullup resistor value */
uint32_t ambiq_pull_up_ohms: 3; uint32_t ambiq_pull_up_ohms: 3;
/** IOM nCE module select */ /** nCE module select */
uint32_t iom_nce: 2; uint32_t nce: 2;
/** IOM or MSPI */ /** IOM or MSPI */
uint32_t iom_mspi: 1; uint32_t iom_mspi: 1;
/** IOM/MSPI instance number */ /** IOM/MSPI instance number */
uint32_t iom_num: 3; uint32_t iom_num: 3;
/** nCE module polarity */
uint32_t nce_pol: 1;
}; };
typedef struct apollo3_pinctrl_soc_pin pinctrl_soc_pin_t; typedef struct apollo3_pinctrl_soc_pin pinctrl_soc_pin_t;
@ -62,9 +64,10 @@ typedef struct apollo3_pinctrl_soc_pin pinctrl_soc_pin_t;
DT_PROP(node_id, bias_pull_up), \ DT_PROP(node_id, bias_pull_up), \
DT_PROP(node_id, bias_pull_down), \ DT_PROP(node_id, bias_pull_down), \
DT_ENUM_IDX(node_id, ambiq_pull_up_ohms), \ DT_ENUM_IDX(node_id, ambiq_pull_up_ohms), \
DT_PROP(node_id, ambiq_iom_nce_module), \ DT_PROP(node_id, ambiq_nce_src), \
DT_PROP(node_id, ambiq_iom_mspi), \ DT_PROP(node_id, ambiq_iom_mspi), \
DT_PROP(node_id, ambiq_iom_num), \ DT_PROP(node_id, ambiq_iom_num), \
DT_PROP(node_id, ambiq_nce_pol), \
}, },
/** /**

12
soc/ambiq/apollo4x/pinctrl_soc.h
View file

@ -35,10 +35,10 @@ struct apollo4_pinctrl_soc_pin {
uint32_t bias_pull_down : 1; uint32_t bias_pull_down : 1;
/** pullup resistor value */ /** pullup resistor value */
uint32_t ambiq_pull_up_ohms : 3; uint32_t ambiq_pull_up_ohms : 3;
/** IOM nCE module select */ /** nCE module select */
uint32_t iom_nce : 6; uint32_t nce : 6;
/** IOM interrupt direction */ /** nCE module polarity */
uint32_t interrupt_direction: 2; uint32_t nce_pol: 1;
}; };
typedef struct apollo4_pinctrl_soc_pin pinctrl_soc_pin_t; typedef struct apollo4_pinctrl_soc_pin pinctrl_soc_pin_t;
@ -63,8 +63,8 @@ typedef struct apollo4_pinctrl_soc_pin pinctrl_soc_pin_t;
DT_PROP(node_id, bias_pull_up), \ DT_PROP(node_id, bias_pull_up), \
DT_PROP(node_id, bias_pull_down), \ DT_PROP(node_id, bias_pull_down), \
DT_ENUM_IDX(node_id, ambiq_pull_up_ohms), \ DT_ENUM_IDX(node_id, ambiq_pull_up_ohms), \
DT_PROP(node_id, ambiq_iom_nce_module), \ DT_PROP(node_id, ambiq_nce_src), \
DT_PROP(node_id, ambiq_interrupt_direction), \ DT_PROP(node_id, ambiq_nce_pol), \
}, },
/** /**