boards: riscv: gd32vf103v_eval: initial support

Add initial support for the GD32VF103V-EVAL board. The board is based on
the GD32VF103 RISC-V MCU.

This board can run on Zephyr now largerly thanks to the initial work
done by @soburi.

Note that this board requires using the riscv-openocd fork, however,
programming is slow when using OpenOCD even though it works (including
debugging). J-Link option has also been enabled as it seems to be more
realiable and works _out of the box_. Some details are given in the
board documentation file.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
This commit is contained in:
Gerard Marull-Paretas 2021-12-29 01:50:56 +01:00 committed by Carles Cufí
commit a4790bcfab
10 changed files with 364 additions and 0 deletions

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# Copyright (c) 2021, Teslabs Engineering S.L.
# SPDX-License-Identifier: Apache-2.0
config BOARD_GD32VF103V_EVAL
bool "GigaDevice GD32VF103V-EVAL"
depends on SOC_GD32VF103

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# Copyright (c) 2021 Teslabs Engineering S.L.
# SPDX-License-Identifier: Apache-2.0
if BOARD_GD32VF103V_EVAL
config BOARD
default "gd32vf103v_eval"
endif # BOARD_GD32VF103V_EVAL

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# Copyright (c) 2021, Teslabs Engineering S.L.
# SPDX-License-Identifier: Apache-2.0
board_runner_args(
jlink
"--device=GD32VF103VBT6" "--iface=jtag" "--tool-opt=-JTAGConf -1,-1"
)
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)

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.. _gd32vf103v_eval:
GigaDevice GD32VF103V-EVAL
##########################
Overview
********
The GD32V103V-EVAL board is a hardware platform that enables prototyping
on GD32VF103VB RISC-V MCU.
The GD32VF103VB features a single-core RISC-V 32-bit MCU which can run up
to 108 MHz with flash accesses zero wait states, 128 KiB of Flash, 32 KiB of
SRAM and 80 GPIOs.
.. image:: img/gd32vf103v_eval.jpg
:align: center
:alt: gd32vf103v_eval
Hardware
********
- GD32VF103VBT6 MCU
- AT24C02C 2Kb EEPROM
- GD25Q16 16Mbit SPI and QSPI NOR Flash
- 4 x User LEDs
- 1 x Joystick (L/R/U/D/C)
- 2 x USART (RS-232 at J1/J2 connectors)
- 1 x POT connected to an ADC input
- USB FS connector
- Headphone interface
- 1 x CAN
- 3.2" RGB-LCD (320x240)
- GD-Link on board programmer
- J-Link/JTAG connector
For more information about the GD32VF103 SoC and GD32VF103V-EVAL board:
- `GigaDevice RISC-V Mainstream SoC Website`_
- `GD32VF103 Datasheet`_
- `GD32VF103 User Manual`_
- `GD32VF103V-EVAL Documents`_
Supported Features
==================
The board configuration supports the following hardware features:
.. list-table::
:header-rows: 1
* - Peripheral
- Kconfig option
- Devicetree compatible
* - GPIO
- :kconfig:`CONFIG_GPIO`
- :dtcompatible:`gd,gd32-gpio`
* - Machine timer
- :kconfig:`CONFIG_RISCV_MACHINE_TIMER`
- :dtcompatible:`riscv,machine-timer`
* - Nuclei ECLIC Interrupt Controller
- :kconfig:`CONFIG_NUCLEI_ECLIC`
- :dtcompatible:`nuclei,eclic`
* - PWM
- :kconfig:`CONFIG_PWM`
- :dtcompatible:`gd,gd32-pwm`
* - USART
- :kconfig:`CONFIG_SERIAL`
- :dtcompatible:`gd,gd32-usart`
Serial Port
===========
The GD32VF103V-EVAL board has two serial communications port. The default port
is USART0 with TX connected at PA9 and RX at PA10.
Programming and Debugging
*************************
Before programming your board make sure to configure boot and serial jumpers
as follows:
- JP2/3: Select 2-3 for both (boot from user memory)
- JP5/6: Select 1-2 positions (labeled as ``USART0``)
Using GD-Link
=============
The GD32VF103V-EVAL includes an onboard programmer/debugger (GD-Link) which
allows flash programming and debugging over USB. There is also a JTAG header
(JP1) which can be used with tools like Segger J-Link.
.. note::
The OpenOCD shipped with Zephyr SDK does not support GD32VF103. You will need
to build the `riscv-openocd fork <https://github.com/riscv/riscv-openocd>`_.
Note that compared with OpenOCD, J-Link offers a better programming and
debugging experience on this board.
#. Build the Zephyr kernel and the :ref:`hello_world` sample application:
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: gd32vf103v_eval
:goals: build
:gen-args: -DOPENOCD=<path/to/riscv-openocd/bin/openocd> -DOPENOCD_DEFAULT_PATH=<path/to/riscv-openocd/share/openocd/scripts>
:compact:
#. Run your favorite terminal program to listen for output. On Linux the
terminal should be something like ``/dev/ttyUSB0``. For example:
.. code-block:: console
minicom -D /dev/ttyUSB0 -o
The -o option tells minicom not to send the modem initialization
string. Connection should be configured as follows:
- Speed: 115200
- Data: 8 bits
- Parity: None
- Stop bits: 1
#. To flash an image:
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: gd32vf103v_eval
:goals: flash
:compact:
You should see "Hello World! gd32vf103v_eval" in your terminal.
#. To debug an image:
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: gd32vf103v_eval
:goals: debug
:compact:
.. _GigaDevice RISC-V Mainstream SoC Website:
https://www.gigadevice.com/products/microcontrollers/gd32/risc-v/mainstream-line/
.. _GD32VF103 Datasheet:
https://www.gigadevice.com/datasheet/gd32vf103xxxx-datasheet/
.. _GD32VF103 User Manual:
https://gd32mcu.21ic.com/data/documents/shujushouce/GD32VF103_User_Manual_EN_V1.2.pdf
.. _GD32VF103V-EVAL Documents:
https://github.com/riscv-mcu/GD32VF103_Demo_Suites/tree/master/GD32VF103V_EVAL_Demo_Suites/Docs

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/*
* Copyright (c) 2021, Teslabs Engineering S.L.
* SPDX-License-Identifier: Apache-2.0
*/
#include <dt-bindings/pinctrl/gd32vf103v(b-8)xx-pinctrl.h>
&pinctrl {
usart0_default: usart0_default {
group1 {
pinmux = <USART0_RX_PA10_NORMP>, <USART0_TX_PA9_NORMP>;
};
};
usart1_default: usart1_default {
group1 {
pinmux = <USART1_RX_PA3_NORMP>, <USART1_TX_PA2_NORMP>;
};
};
pwm0_default: pwm0_default {
group1 {
pinmux = <TIMER0_CH0_PA8_OUT_NORMP>;
};
};
};

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/*
* Copyright (c) 2021, Teslabs Engineering S.L.
* SPDX-License-Identifier: Apache-2.0
*/
/dts-v1/;
#include <gigadevice/gd32vf103Xb.dtsi>
#include "gd32vf103v_eval-pinctrl.dtsi"
/ {
model = "GigaDevice GD32VF103V-EVAL";
compatible = "gd,gd32vf103v-eval";
chosen {
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,console = &usart0;
zephyr,shell-uart = &usart0;
};
leds {
compatible = "gpio-leds";
led1: led1 {
gpios = <&gpioc 0 GPIO_ACTIVE_HIGH>;
label = "LED1";
};
led2: led2 {
gpios = <&gpioc 2 GPIO_ACTIVE_HIGH>;
label = "LED2";
};
led3: led3 {
gpios = <&gpioe 0 GPIO_ACTIVE_HIGH>;
label = "LED3";
};
led4: led4 {
gpios = <&gpioe 1 GPIO_ACTIVE_HIGH>;
label = "LED4";
};
};
gpio_keys {
compatible = "gpio-keys";
key_cet: key_cet {
label = "KEY_CET";
gpios = <&gpioc 4 GPIO_ACTIVE_LOW>;
};
key_a: key_a {
label = "KEY_A";
gpios = <&gpioa 0 GPIO_ACTIVE_LOW>;
};
key_b: key_b {
label = "KEY_B";
gpios = <&gpioc 13 GPIO_ACTIVE_LOW>;
};
key_c: key_c {
label = "KEY_C";
gpios = <&gpiob 14 GPIO_ACTIVE_LOW>;
};
key_d: key_d {
label = "KEY_D";
gpios = <&gpioc 5 GPIO_ACTIVE_LOW>;
};
};
pwmleds {
compatible = "pwm-leds";
/* NOTE: bridge TIMER0_CH0 (PA8) and LED1 (PC0) */
pwm_led: pwm_led {
pwms = <&pwm0 0 PWM_POLARITY_NORMAL>;
};
};
aliases {
led0 = &led1;
led1 = &led2;
sw0 = &key_cet;
pwm-led0 = &pwm_led;
};
};
&gpioa {
status = "okay";
};
&gpiob {
status = "okay";
};
&gpioc {
status = "okay";
};
&gpioe {
status = "okay";
};
&usart0 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&usart0_default>;
pinctrl-names = "default";
};
&usart1 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&usart1_default>;
pinctrl-names = "default";
};
&timer0 {
status = "okay";
prescaler = <128>;
pwm0: pwm {
status = "okay";
pinctrl-0 = <&pwm0_default>;
pinctrl-names = "default";
};
};

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# Copyright (c) 2021, Teslabs Engineering S.L.
# SPDX-License-Identifier: Apache-2.0
identifier: gd32vf103v_eval
name: GigaDevice GD32VF103V-EVAL
type: mcu
arch: riscv32
ram: 32
flash: 128
toolchain:
- zephyr
supported:
- uart
- gpio
- pwm

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# Copyright (c) 2021, Teslabs Engineering S.L.
# SPDX-License-Identifier: Apache-2.0
CONFIG_SOC_SERIES_GD32VF103=y
CONFIG_SOC_GD32VF103=y
CONFIG_BOARD_GD32VF103V_EVAL=y
CONFIG_GD32_HXTAL_8MHZ=y
CONFIG_RISCV_MACHINE_TIMER=y
CONFIG_GPIO=y
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
CONFIG_SERIAL=y

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# Copyright (c) 2021, Teslabs Engineering S.L.
# SPDX-License-Identifier: Apache-2.0
# NOTE: This configuration file is intended to be used with the
# https://github.com/riscv/riscv-openocd OpenOCD fork.
source [find interface/cmsis-dap.cfg]
source [find target/gd32vf103.cfg]