diff --git a/boards/arm/96b_avenger96/96b_avenger96.dts b/boards/arm/96b_avenger96/96b_avenger96.dts
index de6fccea9f1..83ce2b1fd06 100644
--- a/boards/arm/96b_avenger96/96b_avenger96.dts
+++ b/boards/arm/96b_avenger96/96b_avenger96.dts
@@ -49,6 +49,10 @@
 	};
 };
 
+&rcc {
+	clock-frequency = <DT_FREQ_M(209)>;
+};
+
 &mailbox {
 	status = "okay";
 };
diff --git a/boards/arm/96b_avenger96/96b_avenger96_defconfig b/boards/arm/96b_avenger96/96b_avenger96_defconfig
index b4e7e7c36ff..21645098186 100644
--- a/boards/arm/96b_avenger96/96b_avenger96_defconfig
+++ b/boards/arm/96b_avenger96/96b_avenger96_defconfig
@@ -1,7 +1,5 @@
 CONFIG_SOC_SERIES_STM32MP1X=y
 CONFIG_SOC_STM32MP15_M4=y
-# 209 MHz system clock (mlhclk_ck)
-CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=209000000
 
 # Enable MPU
 CONFIG_ARM_MPU=y