drivers/sensor: stmemsc: add macros to populate stmdev_ctx_t structure
Add STMEMSC_CTX I2C/SPI/I3C macros that can be reused among all STMEMSC based ST sensor drivers to populate the stmdev_ctx_t stucture. Signed-off-by: Armando Visconti <armando.visconti@st.com>
This commit is contained in:
parent
e7ddb6466b
commit
a4337af69f
9 changed files with 125 additions and 246 deletions
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@ -227,6 +227,10 @@ int hts221_init(const struct device *dev)
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#define HTS221_CFG_IRQ(inst)
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#endif /* CONFIG_HTS221_TRIGGER */
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#define HTS221_CONFIG_COMMON(inst) \
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COND_CODE_1(DT_INST_NODE_HAS_PROP(inst, drdy_gpios), \
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(HTS221_CFG_IRQ(inst)), ())
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#define HTS221_SPI_OPERATION (SPI_WORD_SET(8) | \
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SPI_OP_MODE_MASTER | \
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SPI_MODE_CPOL | \
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@ -235,23 +239,13 @@ int hts221_init(const struct device *dev)
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#define HTS221_CONFIG_SPI(inst) \
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{ \
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.ctx = { \
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.read_reg = \
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(stmdev_read_ptr) stmemsc_spi_read, \
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.write_reg = \
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(stmdev_write_ptr) stmemsc_spi_write, \
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.mdelay = \
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(stmdev_mdelay_ptr) stmemsc_mdelay, \
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.handle = \
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(void *)&hts221_config_##inst.stmemsc_cfg, \
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}, \
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STMEMSC_CTX_SPI(&hts221_config_##inst.stmemsc_cfg), \
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.stmemsc_cfg = { \
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.spi = SPI_DT_SPEC_INST_GET(inst, \
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HTS221_SPI_OPERATION, \
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0), \
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}, \
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COND_CODE_1(DT_INST_NODE_HAS_PROP(inst, drdy_gpios), \
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(HTS221_CFG_IRQ(inst)), ()) \
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HTS221_CONFIG_COMMON(inst) \
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}
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/*
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@ -260,21 +254,11 @@ int hts221_init(const struct device *dev)
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#define HTS221_CONFIG_I2C(inst) \
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{ \
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.ctx = { \
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.read_reg = \
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(stmdev_read_ptr) stmemsc_i2c_read, \
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.write_reg = \
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(stmdev_write_ptr) stmemsc_i2c_write, \
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.mdelay = \
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(stmdev_mdelay_ptr) stmemsc_mdelay, \
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.handle = \
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(void *)&hts221_config_##inst.stmemsc_cfg, \
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}, \
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STMEMSC_CTX_I2C(&hts221_config_##inst.stmemsc_cfg), \
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.stmemsc_cfg = { \
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.i2c = I2C_DT_SPEC_INST_GET(inst), \
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}, \
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COND_CODE_1(DT_INST_NODE_HAS_PROP(inst, drdy_gpios), \
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(HTS221_CFG_IRQ(inst)), ()) \
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HTS221_CONFIG_COMMON(inst) \
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}
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/*
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@ -447,6 +447,13 @@ static int iis2dlpc_init(const struct device *dev)
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#define IIS2DLPC_CFG_IRQ(inst)
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#endif /* CONFIG_IIS2DLPC_TRIGGER */
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#define IIS2DLPC_CONFIG_COMMON(inst) \
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.pm = DT_INST_PROP(inst, power_mode), \
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.range = DT_INST_PROP(inst, range), \
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IIS2DLPC_CONFIG_TAP(inst) \
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COND_CODE_1(DT_INST_NODE_HAS_PROP(inst, drdy_gpios), \
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(IIS2DLPC_CFG_IRQ(inst)), ())
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#define IIS2DLPC_SPI_OPERATION (SPI_WORD_SET(8) | \
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SPI_OP_MODE_MASTER | \
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SPI_MODE_CPOL | \
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@ -454,26 +461,13 @@ static int iis2dlpc_init(const struct device *dev)
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#define IIS2DLPC_CONFIG_SPI(inst) \
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{ \
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.ctx = { \
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.read_reg = \
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(stmdev_read_ptr) stmemsc_spi_read, \
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.write_reg = \
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(stmdev_write_ptr) stmemsc_spi_write, \
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.mdelay = \
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(stmdev_mdelay_ptr) stmemsc_mdelay, \
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.handle = \
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(void *)&iis2dlpc_config_##inst.stmemsc_cfg, \
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}, \
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STMEMSC_CTX_SPI(&iis2dlpc_config_##inst.stmemsc_cfg), \
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.stmemsc_cfg = { \
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.spi = SPI_DT_SPEC_INST_GET(inst, \
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IIS2DLPC_SPI_OPERATION, \
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0), \
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}, \
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.pm = DT_INST_PROP(inst, power_mode), \
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.range = DT_INST_PROP(inst, range), \
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IIS2DLPC_CONFIG_TAP(inst) \
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COND_CODE_1(DT_INST_NODE_HAS_PROP(inst, drdy_gpios), \
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(IIS2DLPC_CFG_IRQ(inst)), ()) \
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IIS2DLPC_CONFIG_COMMON(inst) \
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}
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/*
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@ -482,24 +476,11 @@ static int iis2dlpc_init(const struct device *dev)
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#define IIS2DLPC_CONFIG_I2C(inst) \
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{ \
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.ctx = { \
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.read_reg = \
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(stmdev_read_ptr) stmemsc_i2c_read, \
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.write_reg = \
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(stmdev_write_ptr) stmemsc_i2c_write, \
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.mdelay = \
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(stmdev_mdelay_ptr) stmemsc_mdelay, \
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.handle = \
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(void *)&iis2dlpc_config_##inst.stmemsc_cfg, \
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}, \
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STMEMSC_CTX_I2C(&iis2dlpc_config_##inst.stmemsc_cfg), \
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.stmemsc_cfg = { \
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.i2c = I2C_DT_SPEC_INST_GET(inst), \
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}, \
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.pm = DT_INST_PROP(inst, power_mode), \
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.range = DT_INST_PROP(inst, range), \
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IIS2DLPC_CONFIG_TAP(inst) \
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COND_CODE_1(DT_INST_NODE_HAS_PROP(inst, drdy_gpios), \
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(IIS2DLPC_CFG_IRQ(inst)), ()) \
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IIS2DLPC_CONFIG_COMMON(inst) \
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}
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/*
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@ -651,6 +651,12 @@ static int iis2iclx_init(const struct device *dev)
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#define IIS2ICLX_CFG_IRQ(inst)
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#endif /* CONFIG_IIS2ICLX_TRIGGER */
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#define IIS2ICLX_CONFIG_COMMON(inst) \
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.odr = DT_INST_PROP(inst, odr), \
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.range = DT_INST_PROP(inst, range), \
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COND_CODE_1(DT_INST_NODE_HAS_PROP(inst, drdy_gpios), \
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(IIS2ICLX_CFG_IRQ(inst)), ())
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#define IIS2ICLX_SPI_OPERATION (SPI_WORD_SET(8) | \
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SPI_OP_MODE_MASTER | \
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SPI_MODE_CPOL | \
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@ -658,25 +664,13 @@ static int iis2iclx_init(const struct device *dev)
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#define IIS2ICLX_CONFIG_SPI(inst) \
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{ \
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.ctx = { \
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.read_reg = \
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(stmdev_read_ptr) stmemsc_spi_read, \
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.write_reg = \
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(stmdev_write_ptr) stmemsc_spi_write, \
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.mdelay = \
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(stmdev_mdelay_ptr) stmemsc_mdelay, \
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.handle = \
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(void *)&iis2iclx_config_##inst.stmemsc_cfg, \
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}, \
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STMEMSC_CTX_SPI(&iis2iclx_config_##inst.stmemsc_cfg), \
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.stmemsc_cfg = { \
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.spi = SPI_DT_SPEC_INST_GET(inst, \
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IIS2ICLX_SPI_OPERATION, \
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0), \
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}, \
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.odr = DT_INST_PROP(inst, odr), \
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.range = DT_INST_PROP(inst, range), \
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COND_CODE_1(DT_INST_NODE_HAS_PROP(inst, drdy_gpios), \
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(IIS2ICLX_CFG_IRQ(inst)), ()) \
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IIS2ICLX_CONFIG_COMMON(inst) \
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}
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/*
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@ -685,23 +679,11 @@ static int iis2iclx_init(const struct device *dev)
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#define IIS2ICLX_CONFIG_I2C(inst) \
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{ \
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.ctx = { \
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.read_reg = \
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(stmdev_read_ptr) stmemsc_i2c_read, \
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.write_reg = \
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(stmdev_write_ptr) stmemsc_i2c_write, \
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.mdelay = \
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(stmdev_mdelay_ptr) stmemsc_mdelay, \
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.handle = \
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(void *)&iis2iclx_config_##inst.stmemsc_cfg, \
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}, \
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STMEMSC_CTX_I2C(&iis2iclx_config_##inst.stmemsc_cfg), \
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.stmemsc_cfg = { \
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.i2c = I2C_DT_SPEC_INST_GET(inst), \
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}, \
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.odr = DT_INST_PROP(inst, odr), \
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.range = DT_INST_PROP(inst, range), \
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COND_CODE_1(DT_INST_NODE_HAS_PROP(inst, drdy_gpios), \
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(IIS2ICLX_CFG_IRQ(inst)), ()) \
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IIS2ICLX_CONFIG_COMMON(inst) \
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}
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/*
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@ -352,6 +352,13 @@ static int lis2ds12_init(const struct device *dev)
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#define LIS2DS12_CFG_IRQ(inst)
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#endif /* CONFIG_LIS2DS12_TRIGGER */
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#define LIS2DS12_CONFIG_COMMON(inst) \
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.range = DT_INST_PROP(inst, range), \
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.pm = DT_INST_PROP(inst, power_mode), \
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.odr = DT_INST_PROP(inst, odr), \
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COND_CODE_1(DT_INST_NODE_HAS_PROP(inst, irq_gpios), \
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(LIS2DS12_CFG_IRQ(inst)), ())
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#define LIS2DS12_SPI_OPERATION (SPI_WORD_SET(8) | \
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SPI_OP_MODE_MASTER | \
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SPI_MODE_CPOL | \
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@ -359,26 +366,13 @@ static int lis2ds12_init(const struct device *dev)
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#define LIS2DS12_CONFIG_SPI(inst) \
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{ \
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.ctx = { \
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.read_reg = \
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(stmdev_read_ptr) stmemsc_spi_read, \
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.write_reg = \
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(stmdev_write_ptr) stmemsc_spi_write, \
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.mdelay = \
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(stmdev_mdelay_ptr) stmemsc_mdelay, \
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.handle = \
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(void *)&lis2ds12_config_##inst.stmemsc_cfg, \
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}, \
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STMEMSC_CTX_SPI(&lis2ds12_config_##inst.stmemsc_cfg), \
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.stmemsc_cfg = { \
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.spi = SPI_DT_SPEC_INST_GET(inst, \
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LIS2DS12_SPI_OPERATION, \
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0), \
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}, \
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.range = DT_INST_PROP(inst, range), \
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.pm = DT_INST_PROP(inst, power_mode), \
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.odr = DT_INST_PROP(inst, odr), \
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COND_CODE_1(DT_INST_NODE_HAS_PROP(inst, irq_gpios), \
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(LIS2DS12_CFG_IRQ(inst)), ()) \
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LIS2DS12_CONFIG_COMMON(inst) \
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}
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/*
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@ -387,24 +381,11 @@ static int lis2ds12_init(const struct device *dev)
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#define LIS2DS12_CONFIG_I2C(inst) \
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{ \
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.ctx = { \
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.read_reg = \
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(stmdev_read_ptr) stmemsc_i2c_read, \
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.write_reg = \
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(stmdev_write_ptr) stmemsc_i2c_write, \
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.mdelay = \
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(stmdev_mdelay_ptr) stmemsc_mdelay, \
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.handle = \
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(void *)&lis2ds12_config_##inst.stmemsc_cfg, \
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}, \
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STMEMSC_CTX_I2C(&lis2ds12_config_##inst.stmemsc_cfg), \
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.stmemsc_cfg = { \
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.i2c = I2C_DT_SPEC_INST_GET(inst), \
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}, \
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.range = DT_INST_PROP(inst, range), \
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.pm = DT_INST_PROP(inst, power_mode), \
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.odr = DT_INST_PROP(inst, odr), \
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COND_CODE_1(DT_INST_NODE_HAS_PROP(inst, irq_gpios), \
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(LIS2DS12_CFG_IRQ(inst)), ()) \
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LIS2DS12_CONFIG_COMMON(inst) \
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}
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/*
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@ -529,28 +529,7 @@ static int lis2dw12_init(const struct device *dev)
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#define LIS2DW12_CFG_IRQ(inst)
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#endif /* CONFIG_LIS2DW12_TRIGGER */
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#define LIS2DW12_SPI_OPERATION (SPI_WORD_SET(8) | \
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SPI_OP_MODE_MASTER | \
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SPI_MODE_CPOL | \
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SPI_MODE_CPHA) \
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#define LIS2DW12_CONFIG_SPI(inst) \
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{ \
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.ctx = { \
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.read_reg = \
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(stmdev_read_ptr) stmemsc_spi_read, \
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.write_reg = \
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(stmdev_write_ptr) stmemsc_spi_write, \
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.mdelay = \
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(stmdev_mdelay_ptr) stmemsc_mdelay, \
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.handle = \
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(void *)&lis2dw12_config_##inst.stmemsc_cfg, \
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}, \
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.stmemsc_cfg = { \
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.spi = SPI_DT_SPEC_INST_GET(inst, \
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LIS2DW12_SPI_OPERATION, \
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0), \
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}, \
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#define LIS2DW12_CONFIG_COMMON(inst) \
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.pm = DT_INST_PROP(inst, power_mode), \
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.odr = DT_INST_PROP_OR(inst, odr, 12), \
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.range = DT_INST_PROP(inst, range), \
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@ -562,7 +541,22 @@ static int lis2dw12_init(const struct device *dev)
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LIS2DW12_CONFIG_TAP(inst) \
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LIS2DW12_CONFIG_FREEFALL(inst) \
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COND_CODE_1(DT_INST_NODE_HAS_PROP(inst, irq_gpios), \
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(LIS2DW12_CFG_IRQ(inst)), ()) \
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(LIS2DW12_CFG_IRQ(inst)), ())
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#define LIS2DW12_SPI_OPERATION (SPI_WORD_SET(8) | \
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SPI_OP_MODE_MASTER | \
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SPI_MODE_CPOL | \
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SPI_MODE_CPHA) \
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#define LIS2DW12_CONFIG_SPI(inst) \
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{ \
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STMEMSC_CTX_SPI(&lis2dw12_config_##inst.stmemsc_cfg), \
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.stmemsc_cfg = { \
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.spi = SPI_DT_SPEC_INST_GET(inst, \
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LIS2DW12_SPI_OPERATION, \
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0), \
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}, \
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LIS2DW12_CONFIG_COMMON(inst) \
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}
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/*
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@ -571,31 +565,11 @@ static int lis2dw12_init(const struct device *dev)
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#define LIS2DW12_CONFIG_I2C(inst) \
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{ \
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.ctx = { \
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.read_reg = \
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(stmdev_read_ptr) stmemsc_i2c_read, \
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.write_reg = \
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(stmdev_write_ptr) stmemsc_i2c_write, \
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.mdelay = \
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(stmdev_mdelay_ptr) stmemsc_mdelay, \
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.handle = \
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(void *)&lis2dw12_config_##inst.stmemsc_cfg, \
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}, \
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STMEMSC_CTX_I2C(&lis2dw12_config_##inst.stmemsc_cfg), \
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.stmemsc_cfg = { \
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.i2c = I2C_DT_SPEC_INST_GET(inst), \
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}, \
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.pm = DT_INST_PROP(inst, power_mode), \
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.odr = DT_INST_PROP_OR(inst, odr, 12), \
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.range = DT_INST_PROP(inst, range), \
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.bw_filt = DT_INST_PROP(inst, bw_filt), \
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.low_noise = DT_INST_PROP(inst, low_noise), \
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.hp_filter_path = DT_INST_PROP(inst, hp_filter_path), \
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.hp_ref_mode = DT_INST_PROP(inst, hp_ref_mode), \
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.drdy_pulsed = DT_INST_PROP(inst, drdy_pulsed), \
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LIS2DW12_CONFIG_TAP(inst) \
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LIS2DW12_CONFIG_FREEFALL(inst) \
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COND_CODE_1(DT_INST_NODE_HAS_PROP(inst, irq_gpios), \
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(LIS2DW12_CFG_IRQ(inst)), ()) \
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LIS2DW12_CONFIG_COMMON(inst) \
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}
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/*
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@ -512,6 +512,12 @@ static int lis2mdl_pm_action(const struct device *dev,
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#define LIS2MDL_CFG_IRQ(inst)
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#endif /* CONFIG_LIS2MDL_TRIGGER */
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#define LIS2MDL_CONFIG_COMMON(inst) \
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.cancel_offset = DT_INST_PROP(inst, cancel_offset), \
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.single_mode = DT_INST_PROP(inst, single_mode), \
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COND_CODE_1(DT_INST_NODE_HAS_PROP(inst, irq_gpios), \
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(LIS2MDL_CFG_IRQ(inst)), ())
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#define LIS2MDL_SPI_OPERATION (SPI_WORD_SET(8) | \
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SPI_OP_MODE_MASTER | \
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SPI_MODE_CPOL | \
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@ -519,26 +525,14 @@ static int lis2mdl_pm_action(const struct device *dev,
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#define LIS2MDL_CONFIG_SPI(inst) \
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{ \
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.ctx = { \
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.read_reg = \
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(stmdev_read_ptr) stmemsc_spi_read, \
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.write_reg = \
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(stmdev_write_ptr) stmemsc_spi_write, \
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.mdelay = \
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(stmdev_mdelay_ptr) stmemsc_mdelay, \
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.handle = \
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(void *)&lis2mdl_config_##inst.stmemsc_cfg, \
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}, \
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STMEMSC_CTX_SPI(&lis2mdl_config_##inst.stmemsc_cfg), \
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.stmemsc_cfg = { \
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.spi = SPI_DT_SPEC_INST_GET(inst, \
|
||||
LIS2MDL_SPI_OPERATION, \
|
||||
0), \
|
||||
}, \
|
||||
.cancel_offset = DT_INST_PROP(inst, cancel_offset), \
|
||||
.single_mode = DT_INST_PROP(inst, single_mode), \
|
||||
.spi_4wires = DT_INST_PROP(inst, spi_full_duplex), \
|
||||
COND_CODE_1(DT_INST_NODE_HAS_PROP(inst, irq_gpios), \
|
||||
(LIS2MDL_CFG_IRQ(inst)), ()) \
|
||||
LIS2MDL_CONFIG_COMMON(inst) \
|
||||
}
|
||||
|
||||
/*
|
||||
|
@ -547,23 +541,11 @@ static int lis2mdl_pm_action(const struct device *dev,
|
|||
|
||||
#define LIS2MDL_CONFIG_I2C(inst) \
|
||||
{ \
|
||||
.ctx = { \
|
||||
.read_reg = \
|
||||
(stmdev_read_ptr) stmemsc_i2c_read, \
|
||||
.write_reg = \
|
||||
(stmdev_write_ptr) stmemsc_i2c_write, \
|
||||
.mdelay = \
|
||||
(stmdev_mdelay_ptr) stmemsc_mdelay, \
|
||||
.handle = \
|
||||
(void *)&lis2mdl_config_##inst.stmemsc_cfg, \
|
||||
}, \
|
||||
STMEMSC_CTX_I2C(&lis2mdl_config_##inst.stmemsc_cfg), \
|
||||
.stmemsc_cfg = { \
|
||||
.i2c = I2C_DT_SPEC_INST_GET(inst), \
|
||||
}, \
|
||||
.cancel_offset = DT_INST_PROP(inst, cancel_offset), \
|
||||
.single_mode = DT_INST_PROP(inst, single_mode), \
|
||||
COND_CODE_1(DT_INST_NODE_HAS_PROP(inst, irq_gpios), \
|
||||
(LIS2MDL_CFG_IRQ(inst)), ()) \
|
||||
LIS2MDL_CONFIG_COMMON(inst) \
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
|
@ -258,6 +258,11 @@ static int lps22hh_init(const struct device *dev)
|
|||
#define LPS22HH_CFG_IRQ(inst)
|
||||
#endif /* CONFIG_LPS22HH_TRIGGER */
|
||||
|
||||
#define LPS22HH_CONFIG_COMMON(inst) \
|
||||
.odr = DT_INST_PROP(inst, odr), \
|
||||
COND_CODE_1(DT_INST_NODE_HAS_PROP(inst, drdy_gpios), \
|
||||
(LPS22HH_CFG_IRQ(inst)), ())
|
||||
|
||||
#define LPS22HH_SPI_OPERATION (SPI_WORD_SET(8) | \
|
||||
SPI_OP_MODE_MASTER | \
|
||||
SPI_MODE_CPOL | \
|
||||
|
@ -265,24 +270,13 @@ static int lps22hh_init(const struct device *dev)
|
|||
|
||||
#define LPS22HH_CONFIG_SPI(inst) \
|
||||
{ \
|
||||
.ctx = { \
|
||||
.read_reg = \
|
||||
(stmdev_read_ptr) stmemsc_spi_read, \
|
||||
.write_reg = \
|
||||
(stmdev_write_ptr) stmemsc_spi_write, \
|
||||
.mdelay = \
|
||||
(stmdev_mdelay_ptr) stmemsc_mdelay, \
|
||||
.handle = \
|
||||
(void *)&lps22hh_config_##inst.stmemsc_cfg, \
|
||||
}, \
|
||||
STMEMSC_CTX_SPI(&lps22hh_config_##inst.stmemsc_cfg), \
|
||||
.stmemsc_cfg = { \
|
||||
.spi = SPI_DT_SPEC_INST_GET(inst, \
|
||||
LPS22HH_SPI_OPERATION, \
|
||||
0), \
|
||||
}, \
|
||||
.odr = DT_INST_PROP(inst, odr), \
|
||||
COND_CODE_1(DT_INST_NODE_HAS_PROP(inst, drdy_gpios), \
|
||||
(LPS22HH_CFG_IRQ(inst)), ()) \
|
||||
LPS22HH_CONFIG_COMMON(inst) \
|
||||
}
|
||||
|
||||
/*
|
||||
|
@ -291,22 +285,11 @@ static int lps22hh_init(const struct device *dev)
|
|||
|
||||
#define LPS22HH_CONFIG_I2C(inst) \
|
||||
{ \
|
||||
.ctx = { \
|
||||
.read_reg = \
|
||||
(stmdev_read_ptr) stmemsc_i2c_read, \
|
||||
.write_reg = \
|
||||
(stmdev_write_ptr) stmemsc_i2c_write, \
|
||||
.mdelay = \
|
||||
(stmdev_mdelay_ptr) stmemsc_mdelay, \
|
||||
.handle = \
|
||||
(void *)&lps22hh_config_##inst.stmemsc_cfg, \
|
||||
}, \
|
||||
STMEMSC_CTX_I2C(&lps22hh_config_##inst.stmemsc_cfg), \
|
||||
.stmemsc_cfg = { \
|
||||
.i2c = I2C_DT_SPEC_INST_GET(inst), \
|
||||
}, \
|
||||
.odr = DT_INST_PROP(inst, odr), \
|
||||
COND_CODE_1(DT_INST_NODE_HAS_PROP(inst, drdy_gpios), \
|
||||
(LPS22HH_CFG_IRQ(inst)), ()) \
|
||||
LPS22HH_CONFIG_COMMON(inst) \
|
||||
}
|
||||
|
||||
/*
|
||||
|
@ -315,20 +298,13 @@ static int lps22hh_init(const struct device *dev)
|
|||
|
||||
#define LPS22HH_CONFIG_I3C(inst) \
|
||||
{ \
|
||||
.ctx = { \
|
||||
.read_reg = \
|
||||
(stmdev_read_ptr) stmemsc_i3c_read, \
|
||||
.write_reg = \
|
||||
(stmdev_write_ptr) stmemsc_i3c_write, \
|
||||
.handle = \
|
||||
(void *)&lps22hh_config_##inst.stmemsc_cfg, \
|
||||
}, \
|
||||
STMEMSC_CTX_I3C(&lps22hh_config_##inst.stmemsc_cfg), \
|
||||
.stmemsc_cfg = { \
|
||||
.i3c = &lps22hh_data_##inst.i3c_dev, \
|
||||
}, \
|
||||
.odr = DT_INST_PROP(inst, odr), \
|
||||
.i3c.bus = DEVICE_DT_GET(DT_INST_BUS(inst)), \
|
||||
.i3c.dev_id = I3C_DEVICE_ID_DT_INST(inst), \
|
||||
LPS22HH_CONFIG_COMMON(inst) \
|
||||
}
|
||||
|
||||
#define LPS22HH_CONFIG_I3C_OR_I2C(inst) \
|
||||
|
|
|
@ -923,16 +923,7 @@ static int lsm6dso_init(const struct device *dev)
|
|||
|
||||
#define LSM6DSO_CONFIG_SPI(inst) \
|
||||
{ \
|
||||
.ctx = { \
|
||||
.read_reg = \
|
||||
(stmdev_read_ptr) stmemsc_spi_read, \
|
||||
.write_reg = \
|
||||
(stmdev_write_ptr) stmemsc_spi_write, \
|
||||
.mdelay = \
|
||||
(stmdev_mdelay_ptr) stmemsc_mdelay, \
|
||||
.handle = \
|
||||
(void *)&lsm6dso_config_##inst.stmemsc_cfg, \
|
||||
}, \
|
||||
STMEMSC_CTX_SPI(&lsm6dso_config_##inst.stmemsc_cfg), \
|
||||
.stmemsc_cfg = { \
|
||||
.spi = SPI_DT_SPEC_INST_GET(inst, \
|
||||
LSM6DSO_SPI_OP, \
|
||||
|
@ -947,16 +938,7 @@ static int lsm6dso_init(const struct device *dev)
|
|||
|
||||
#define LSM6DSO_CONFIG_I2C(inst) \
|
||||
{ \
|
||||
.ctx = { \
|
||||
.read_reg = \
|
||||
(stmdev_read_ptr) stmemsc_i2c_read, \
|
||||
.write_reg = \
|
||||
(stmdev_write_ptr) stmemsc_i2c_write, \
|
||||
.mdelay = \
|
||||
(stmdev_mdelay_ptr) stmemsc_mdelay, \
|
||||
.handle = \
|
||||
(void *)&lsm6dso_config_##inst.stmemsc_cfg, \
|
||||
}, \
|
||||
STMEMSC_CTX_I2C(&lsm6dso_config_##inst.stmemsc_cfg), \
|
||||
.stmemsc_cfg = { \
|
||||
.i2c = I2C_DT_SPEC_INST_GET(inst), \
|
||||
}, \
|
||||
|
|
|
@ -15,12 +15,25 @@
|
|||
#include <zephyr/drivers/i3c.h>
|
||||
#include <zephyr/drivers/spi.h>
|
||||
|
||||
|
||||
static inline void stmemsc_mdelay(uint32_t millisec)
|
||||
{
|
||||
k_msleep(millisec);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_I2C
|
||||
/*
|
||||
* Populate the stmdev_ctx_t structure pointed by stmdev_ctx_ptr with
|
||||
* stmemsc i2c APIs.
|
||||
*/
|
||||
#define STMEMSC_CTX_I2C(stmdev_ctx_ptr) \
|
||||
.ctx = { \
|
||||
.read_reg = (stmdev_read_ptr) stmemsc_i2c_read, \
|
||||
.write_reg = (stmdev_write_ptr) stmemsc_i2c_write, \
|
||||
.mdelay = (stmdev_mdelay_ptr) stmemsc_mdelay, \
|
||||
.handle = (void *)stmdev_ctx_ptr \
|
||||
}
|
||||
|
||||
int stmemsc_i2c_read(const struct i2c_dt_spec *stmemsc,
|
||||
uint8_t reg_addr, uint8_t *value, uint8_t len);
|
||||
int stmemsc_i2c_write(const struct i2c_dt_spec *stmemsc,
|
||||
|
@ -28,6 +41,18 @@ int stmemsc_i2c_write(const struct i2c_dt_spec *stmemsc,
|
|||
#endif
|
||||
|
||||
#ifdef CONFIG_I3C
|
||||
/*
|
||||
* Populate the stmdev_ctx_t structure pointed by stmdev_ctx_ptr with
|
||||
* stmemsc i3c APIs.
|
||||
*/
|
||||
#define STMEMSC_CTX_I3C(stmdev_ctx_ptr) \
|
||||
.ctx = { \
|
||||
.read_reg = (stmdev_read_ptr) stmemsc_i3c_read, \
|
||||
.write_reg = (stmdev_write_ptr) stmemsc_i3c_write, \
|
||||
.mdelay = (stmdev_mdelay_ptr) stmemsc_mdelay, \
|
||||
.handle = (void *)stmdev_ctx_ptr \
|
||||
}
|
||||
|
||||
int stmemsc_i3c_read(void *stmemsc,
|
||||
uint8_t reg_addr, uint8_t *value, uint8_t len);
|
||||
int stmemsc_i3c_write(void *stmemsc,
|
||||
|
@ -35,6 +60,18 @@ int stmemsc_i3c_write(void *stmemsc,
|
|||
#endif
|
||||
|
||||
#ifdef CONFIG_SPI
|
||||
/*
|
||||
* Populate the stmdev_ctx_t structure pointed by stmdev_ctx_ptr with
|
||||
* stmemsc spi APIs.
|
||||
*/
|
||||
#define STMEMSC_CTX_SPI(stmdev_ctx_ptr) \
|
||||
.ctx = { \
|
||||
.read_reg = (stmdev_read_ptr) stmemsc_spi_read, \
|
||||
.write_reg = (stmdev_write_ptr) stmemsc_spi_write, \
|
||||
.mdelay = (stmdev_mdelay_ptr) stmemsc_mdelay, \
|
||||
.handle = (void *)stmdev_ctx_ptr \
|
||||
}
|
||||
|
||||
int stmemsc_spi_read(const struct spi_dt_spec *stmemsc,
|
||||
uint8_t reg_addr, uint8_t *value, uint8_t len);
|
||||
int stmemsc_spi_write(const struct spi_dt_spec *stmemsc,
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue