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boards: stm32373c_eval: Use dts for clocks configuration

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Convert board to use of device tree for clocks configuration.

Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
This commit is contained in:
Alexandre Bourdiol 2021-04-30 18:03:13 +02:00 • committed by Kumar Gala
commit a3d209dfee
2 changed files with 21 additions and 16 deletions
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20
boards/arm/stm32373c_eval/stm32373c_eval.dts
View file

@ -41,6 +41,26 @@
};
};
&clk_hse {
clock-frequency = <DT_FREQ_M(8)>;
status = "okay";
};
&pll {
prediv = <1>;
mul = <9>;
clocks = <&clk_hse>;
status = "okay";
};
&rcc {
clocks = <&pll>;
clock-frequency = <DT_FREQ_M(72)>;
ahb-prescaler = <1>;
apb1-prescaler = <2>;
apb2-prescaler = <2>;
};
&usart2 {
pinctrl-0 = <&usart2_tx_pd5 &usart2_rx_pd6>;
current-speed = <115200>;

17
boards/arm/stm32373c_eval/stm32373c_eval_defconfig
View file

@ -15,9 +15,6 @@ CONFIG_ARM_MPU=y
# Enable HW stack protection
CONFIG_HW_STACK_PROTECTION=y
# General Kernel Options
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000
# Serial Drivers
CONFIG_SERIAL=y
CONFIG_UART_INTERRUPT_DRIVEN=y
@ -31,17 +28,5 @@ CONFIG_PINMUX=y
# GPIO Controller
CONFIG_GPIO=y
# Clock configuration
# Enable Clocks
CONFIG_CLOCK_CONTROL=y
# SYSCLK selection
CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y
# HSE configuration
CONFIG_CLOCK_STM32_HSE_CLOCK=8000000
# PLL configuration
CONFIG_CLOCK_STM32_PLL_SRC_HSE=y
# produce 72MHz clock at PLL output
CONFIG_CLOCK_STM32_PLL_PREDIV=1
CONFIG_CLOCK_STM32_PLL_MULTIPLIER=9
CONFIG_CLOCK_STM32_AHB_PRESCALER=1
CONFIG_CLOCK_STM32_APB1_PRESCALER=2
CONFIG_CLOCK_STM32_APB2_PRESCALER=2