doc: add doc of arc floating point support
add doc of arc floating point support Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
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@ -8,9 +8,9 @@ configurations that support these registers.
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.. note::
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Floating point services are currently available only for boards
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based on either ARM Cortex-M SoCs supporting the Floating Point Extension,
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or the Intel x86 architecture. The
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services provided are architecture specific.
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based on ARM Cortex-M SoCs supporting the Floating Point Extension,
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the Intel x86 architecture and ARCv2 SoCs supporting the Floating
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Point Extension. The services provided are architecture specific.
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The kernel does not support the use of floating point registers by ISRs.
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@ -42,9 +42,9 @@ This mode is used when the application has only a single thread
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that uses floating point registers.
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On x86 platforms, the kernel initializes the floating point registers so they can
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be used by any thread (initialization in skipped on ARM Cortex-M platforms).
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The floating point registers are left unchanged
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whenever a context switch occurs.
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be used by any thread (initialization in skipped on ARM Cortex-M platforms and
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ARCv2 platforms). The floating point registers are left unchanged whenever a
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context switch occurs.
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.. note::
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The behavior is undefined, if two or more threads attempt to use
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@ -71,6 +71,9 @@ by any thread, then saves and restores these registers during
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context switches to ensure the computations performed by each FPU user
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or SSE user are not impacted by the computations performed by the other users.
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ARM Cortex-M architecture (with the Floating Point Extension)
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-------------------------------------------------------------
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On the ARM Cortex-M architecture with the Floating Point Extension, the kernel
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treats *all* threads as FPU users when shared FP registers mode is enabled.
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This means that any thread is allowed to access the floating point registers.
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@ -113,6 +116,37 @@ If an ARM thread does not require use of the floating point registers any
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more, it can call :cpp:func:`k_float_disable()`. This instructs the kernel
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not to save or restore its FP context during thread context switching.
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ARCv2 architecture
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------------------
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On the ARCv2 architecture, the kernel treats each thread as a non-user
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or FPU user and the thread must be tagged by one of the
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following techniques.
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* A statically-created ARC thread can be tagged by passing the
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:c:macro:`K_FP_REGS` option to :c:macro:`K_THREAD_DEFINE`.
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* A dynamically-created ARC thread can be tagged by passing the
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:c:macro:`K_FP_REGS` to :cpp:func:`k_thread_create()`.
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If an ARC thread does not require use of the floating point registers any
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more, it can call :cpp:func:`k_float_disable()`. This instructs the kernel
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not to save or restore its FP context during thread context switching.
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During thread context switching the ARC kernel saves the *callee-saved*
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floating point registers, if the switched-out thread has been using them.
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Additionally, the *caller-saved* floating point registers are saved on
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the thread's stack. If the switched-in thread has been using the floating
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point registers, the kernel restores the *callee-saved* FP registers of
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the switched-in thread and the *caller-saved* FP context is restored from
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the thread's stack. Thus, the kernel does not save or restore the FP
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context of threads that are not using the FP registers. An extra 16 bytes
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(single floating point hardware) or 32 bytes (double floating point hardware)
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of stack space is required to load and store floating point registers.
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x86 architecture
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----------------
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On the x86 architecture the kernel treats each thread as a non-user,
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FPU user or SSE user on a case-by-case basis. A "lazy save" algorithm is used
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during context switching which updates the floating point registers only when
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