From a332ee317229c6801bada759f4816b5d90f00518 Mon Sep 17 00:00:00 2001 From: Guillaume Gautier Date: Tue, 13 Sep 2022 14:37:31 +0200 Subject: [PATCH] drivers: clock_control: clock_stm32: Add support for lse bypass Add support for LSE bypass for all STM32 series Signed-off-by: Guillaume Gautier --- drivers/clock_control/clock_stm32_ll_common.c | 5 +++++ drivers/clock_control/clock_stm32_ll_h7.c | 5 +++++ drivers/clock_control/clock_stm32_ll_u5.c | 5 +++++ 3 files changed, 15 insertions(+) diff --git a/drivers/clock_control/clock_stm32_ll_common.c b/drivers/clock_control/clock_stm32_ll_common.c index ef64a880158..e6238b45545 100644 --- a/drivers/clock_control/clock_stm32_ll_common.c +++ b/drivers/clock_control/clock_stm32_ll_common.c @@ -616,6 +616,11 @@ static void set_up_fixed_clock_sources(void) LL_RCC_LSE_SetDriveCapability(STM32_LSE_DRIVING << RCC_BDCR_LSEDRV_Pos); #endif + if (IS_ENABLED(STM32_LSE_BYPASS)) { + /* Configure LSE bypass */ + LL_RCC_LSE_EnableBypass(); + } + /* Enable LSE Oscillator (32.768 kHz) */ LL_RCC_LSE_Enable(); while (!LL_RCC_LSE_IsReady()) { diff --git a/drivers/clock_control/clock_stm32_ll_h7.c b/drivers/clock_control/clock_stm32_ll_h7.c index cc5f1a806bf..d258a16b34a 100644 --- a/drivers/clock_control/clock_stm32_ll_h7.c +++ b/drivers/clock_control/clock_stm32_ll_h7.c @@ -602,6 +602,11 @@ static void set_up_fixed_clock_sources(void) /* Configure driving capability */ LL_RCC_LSE_SetDriveCapability(STM32_LSE_DRIVING << RCC_BDCR_LSEDRV_Pos); + if (IS_ENABLED(STM32_LSE_BYPASS)) { + /* Configure LSE bypass */ + LL_RCC_LSE_EnableBypass(); + } + /* Enable LSE oscillator */ LL_RCC_LSE_Enable(); while (LL_RCC_LSE_IsReady() != 1) { diff --git a/drivers/clock_control/clock_stm32_ll_u5.c b/drivers/clock_control/clock_stm32_ll_u5.c index 2fc1a4de098..83892a25776 100644 --- a/drivers/clock_control/clock_stm32_ll_u5.c +++ b/drivers/clock_control/clock_stm32_ll_u5.c @@ -628,6 +628,11 @@ static void set_up_fixed_clock_sources(void) /* Configure driving capability */ LL_RCC_LSE_SetDriveCapability(STM32_LSE_DRIVING << RCC_BDCR_LSEDRV_Pos); + if (IS_ENABLED(STM32_LSE_BYPASS)) { + /* Configure LSE bypass */ + LL_RCC_LSE_EnableBypass(); + } + /* Enable LSE Oscillator */ LL_RCC_LSE_Enable(); /* Wait for LSE ready */