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drivers: i2c: Update sam drivers to use pinctrl

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This update Atmel sam i2c drivers to use pinctrl driver and API. It
updates all boards with new pinctrl groups format. This add missing
i2c-0 alias into sam4l_ek board.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
This commit is contained in:
Gerson Fernando Budke 2022-03-12 15:56:05 -03:00 • committed by Marti Bolivar
commit a27304b658
23 changed files with 127 additions and 77 deletions
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13
boards/arm/arduino_due/arduino_due-pinctrl.dtsi
View file

@ -6,6 +6,19 @@
#include <dt-bindings/pinctrl/sam3XXh-pinctrl.h>
&pinctrl {
twi0_default: twi0_default {
group1 {
pinmux = <PA18A_TWI0_TWCK>,
<PA17A_TWI0_TWD>;
};
};
twi1_default: twi1_default {
group1 {
pinmux = <PB13A_TWI1_TWCK>,
<PB12A_TWI1_TWD>;
};
};
uart_default: uart_default {
group1 {
pinmux = <PA8A_UART_RXD>;

6
boards/arm/arduino_due/arduino_due.dts
View file

@ -43,10 +43,16 @@
&twi0 {
status = "okay";
pinctrl-0 = <&twi0_default>;
pinctrl-names = "default";
};
&twi1 {
status = "okay";
pinctrl-0 = <&twi1_default>;
pinctrl-names = "default";
};
&uart {

7
boards/arm/sam4e_xpro/sam4e_xpro-pinctrl.dtsi
View file

@ -17,6 +17,13 @@
};
};
twi0_default: twi0_default {
group1 {
pinmux = <PA4A_TWI0_TWCK>,
<PA3A_TWI0_TWD>;
};
};
uart0_default: uart0_default {
group1 {
pinmux = <PA9A_UART0_RXD>,

7
boards/arm/sam4e_xpro/sam4e_xpro.dts
View file

@ -124,6 +124,13 @@
clock-frequency = <120000000>;
};
&twi0 {
status = "okay";
pinctrl-0 = <&twi0_default>;
pinctrl-names = "default";
};
&spi0 {
status = "okay";

7
boards/arm/sam4l_ek/sam4l_ek-pinctrl.dtsi
View file

@ -16,6 +16,13 @@
};
};
twi0_default: twi0_default {
group1 {
pinmux = <PA24B_TWIMS0_TWCK>,
<PA23B_TWIMS0_TWD>;
};
};
usart0_default: usart0_default {
group1 {
pinmux = <PC2C_USART0_RXD>,

4
boards/arm/sam4l_ek/sam4l_ek.dts
View file

@ -13,6 +13,7 @@
compatible = "atmel,sam4l_ek";
aliases {
i2c-0 = &twim0;
led0 = &user_led;
sw0 = &sw0_dfu;
};
@ -72,6 +73,9 @@
&twim0 {
status = "okay";
pinctrl-0 = <&twi0_default>;
pinctrl-names = "default";
std-clk-slew-lim = <0>;
std-clk-strength-low = "0.5";
std-data-slew-lim = <0>;

7
boards/arm/sam4s_xplained/sam4s_xplained-pinctrl.dtsi
View file

@ -16,6 +16,13 @@
};
};
twi0_default: twi0_default {
group1 {
pinmux = <PA4A_TWI0_TWCK>,
<PA3A_TWI0_TWD>;
};
};
uart0_default: uart0_default {
group1 {
pinmux = <PA9A_UART0_RXD>,

3
boards/arm/sam4s_xplained/sam4s_xplained.dts
View file

@ -122,6 +122,9 @@
&twi0 {
status = "okay";
pinctrl-0 = <&twi0_default>;
pinctrl-names = "default";
};
&spi0 {

9
boards/arm/sam_e70_xplained/sam_e70_xplained-common.dtsi
View file

@ -12,8 +12,7 @@
/ {
aliases {
i2c-0 = &twihs0;
i2c-1 = &twihs1;
i2c-2 = &twihs2;
i2c-1 = &twihs2;
led0 = &green_led;
sw0 = &sw0_user_button;
};
@ -66,10 +65,16 @@
&twihs0 {
status = "okay";
pinctrl-0 = <&twihs0_default>;
pinctrl-names = "default";
};
&twihs2 {
status = "okay";
pinctrl-0 = <&twihs2_default>;
pinctrl-names = "default";
};
&spi0 {

13
boards/arm/sam_e70_xplained/sam_e70_xplained-pinctrl.dtsi
View file

@ -16,6 +16,19 @@
};
};
twihs0_default: twihs0_default {
group1 {
pinmux = <PA4A_TWI0_TWCK>,
<PA3A_TWI0_TWD>;
};
};
twihs2_default: twihs2_default {
group1 {
pinmux = <PD28C_TWI2_TWCK>,
<PD27C_TWI2_TWD>;
};
};
uart3_default: uart3_default {
group1 {
pinmux = <PD28A_UART3_RXD>,

9
boards/arm/sam_v71_xult/sam_v71_xult-common.dtsi
View file

@ -12,8 +12,7 @@
/ {
aliases {
i2c-0 = &twihs0;
i2c-1 = &twihs1;
i2c-2 = &twihs2;
i2c-1 = &twihs2;
led0 = &yellow_led1;
pwm-led0 = &pwm_led0;
pwm-0 = &pwm0;
@ -165,10 +164,16 @@
&twihs0 {
status = "okay";
pinctrl-0 = <&twihs0_default>;
pinctrl-names = "default";
};
&twihs2 {
status = "okay";
pinctrl-0 = <&twihs2_default>;
pinctrl-names = "default";
};
&spi0 {

13
boards/arm/sam_v71_xult/sam_v71_xult-pinctrl.dtsi
View file

@ -16,6 +16,19 @@
};
};
twihs0_default: twihs0_default {
group1 {
pinmux = <PA4A_TWI0_TWCK>,
<PA3A_TWI0_TWD>;
};
};
twihs2_default: twihs2_default {
group1 {
pinmux = <PD28C_TWI2_TWCK>,
<PD27C_TWI2_TWD>;
};
};
uart3_default: uart3_default {
group1 {
pinmux = <PD28A_UART3_RXD>,

15
drivers/i2c/i2c_sam4l_twim.c
View file

@ -22,6 +22,7 @@
#include <init.h>
#include <soc.h>
#include <drivers/i2c.h>
#include <drivers/pinctrl.h>
#define LOG_LEVEL CONFIG_I2C_LOG_LEVEL
#include <logging/log.h>
@ -64,8 +65,7 @@ struct i2c_sam_twim_dev_cfg {
Twim *regs;
void (*irq_config)(void);
uint32_t bitrate;
const struct soc_gpio_pin *pin_list;
uint8_t pin_list_size;
const struct pinctrl_dev_config *pcfg;
uint8_t periph_id;
uint8_t irq_id;
@ -552,7 +552,10 @@ static int i2c_sam_twim_initialize(const struct device *dev)
k_sem_init(&data->sem, 0, 1);
/* Connect pins to the peripheral */
soc_gpio_list_configure(cfg->pin_list, cfg->pin_list_size);
ret = pinctrl_apply_state(cfg->pcfg, PINCTRL_STATE_DEFAULT);
if (ret < 0) {
return ret;
}
/* Enable module's clock */
soc_pmc_peripheral_enable(cfg->periph_id);
@ -599,6 +602,7 @@ static const struct i2c_driver_api i2c_sam_twim_driver_api = {
.hs_data_strength_low = DT_INST_ENUM_IDX(n, hs_data_strength_low)
#define I2C_TWIM_SAM_INIT(n) \
PINCTRL_DT_INST_DEFINE(n); \
static void i2c##n##_sam_irq_config(void) \
{ \
IRQ_CONNECT(DT_INST_IRQN(n), DT_INST_IRQ(n, priority), \
@ -606,15 +610,12 @@ static const struct i2c_driver_api i2c_sam_twim_driver_api = {
DEVICE_DT_INST_GET(n), 0); \
} \
\
static const struct soc_gpio_pin pins_twim##n[] = ATMEL_SAM_DT_INST_PINS(n); \
\
static const struct i2c_sam_twim_dev_cfg i2c##n##_sam_config = {\
.regs = (Twim *)DT_INST_REG_ADDR(n), \
.irq_config = i2c##n##_sam_irq_config, \
.periph_id = DT_INST_PROP(n, peripheral_id), \
.irq_id = DT_INST_IRQN(n), \
.pin_list = pins_twim##n, \
.pin_list_size = ARRAY_SIZE(pins_twim##n), \
.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n), \
.bitrate = DT_INST_PROP(n, clock_frequency), \
.hs_master_code = DT_INST_ENUM_IDX(n, hs_master_code), \
I2C_TWIM_SAM_SLEW_REGS(n), \

15
drivers/i2c/i2c_sam_twi.c
View file

@ -22,6 +22,7 @@
#include <init.h>
#include <soc.h>
#include <drivers/i2c.h>
#include <drivers/pinctrl.h>
#define LOG_LEVEL CONFIG_I2C_LOG_LEVEL
#include <logging/log.h>
@ -41,8 +42,7 @@ struct i2c_sam_twi_dev_cfg {
Twi *regs;
void (*irq_config)(void);
uint32_t bitrate;
const struct soc_gpio_pin *pin_list;
uint8_t pin_list_size;
const struct pinctrl_dev_config *pcfg;
uint8_t periph_id;
uint8_t irq_id;
};
@ -303,7 +303,10 @@ static int i2c_sam_twi_initialize(const struct device *dev)
k_sem_init(&dev_data->sem, 0, 1);
/* Connect pins to the peripheral */
soc_gpio_list_configure(dev_cfg->pin_list, dev_cfg->pin_list_size);
ret = pinctrl_apply_state(dev_cfg->pcfg, PINCTRL_STATE_DEFAULT);
if (ret < 0) {
return ret;
}
/* Enable module's clock */
soc_pmc_peripheral_enable(dev_cfg->periph_id);
@ -333,6 +336,7 @@ static const struct i2c_driver_api i2c_sam_twi_driver_api = {
};
#define I2C_TWI_SAM_INIT(n) \
PINCTRL_DT_INST_DEFINE(n); \
static void i2c##n##_sam_irq_config(void) \
{ \
IRQ_CONNECT(DT_INST_IRQN(n), DT_INST_IRQ(n, priority), \
@ -340,15 +344,12 @@ static const struct i2c_driver_api i2c_sam_twi_driver_api = {
DEVICE_DT_INST_GET(n), 0); \
} \
\
static const struct soc_gpio_pin pins_twi##n[] = ATMEL_SAM_DT_INST_PINS(n); \
\
static const struct i2c_sam_twi_dev_cfg i2c##n##_sam_config = { \
.regs = (Twi *)DT_INST_REG_ADDR(n), \
.irq_config = i2c##n##_sam_irq_config, \
.periph_id = DT_INST_PROP(n, peripheral_id), \
.irq_id = DT_INST_IRQN(n), \
.pin_list = pins_twi##n, \
.pin_list_size = ARRAY_SIZE(pins_twi##n), \
.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n), \
.bitrate = DT_INST_PROP(n, clock_frequency), \
}; \
\

15
drivers/i2c/i2c_sam_twihs.c
View file

@ -20,6 +20,7 @@
#include <init.h>
#include <soc.h>
#include <drivers/i2c.h>
#include <drivers/pinctrl.h>
#define LOG_LEVEL CONFIG_I2C_LOG_LEVEL
#include <logging/log.h>
@ -41,8 +42,7 @@ struct i2c_sam_twihs_dev_cfg {
Twihs *regs;
void (*irq_config)(void);
uint32_t bitrate;
const struct soc_gpio_pin *pin_list;
uint8_t pin_list_size;
const struct pinctrl_dev_config *pcfg;
uint8_t periph_id;
uint8_t irq_id;
};
@ -290,7 +290,10 @@ static int i2c_sam_twihs_initialize(const struct device *dev)
k_sem_init(&dev_data->sem, 0, 1);
/* Connect pins to the peripheral */
soc_gpio_list_configure(dev_cfg->pin_list, dev_cfg->pin_list_size);
ret = pinctrl_apply_state(dev_cfg->pcfg, PINCTRL_STATE_DEFAULT);
if (ret < 0) {
return ret;
}
/* Enable module's clock */
soc_pmc_peripheral_enable(dev_cfg->periph_id);
@ -320,6 +323,7 @@ static const struct i2c_driver_api i2c_sam_twihs_driver_api = {
};
#define I2C_TWIHS_SAM_INIT(n) \
PINCTRL_DT_INST_DEFINE(n); \
static void i2c##n##_sam_irq_config(void) \
{ \
IRQ_CONNECT(DT_INST_IRQN(n), DT_INST_IRQ(n, priority), \
@ -327,15 +331,12 @@ static const struct i2c_driver_api i2c_sam_twihs_driver_api = {
DEVICE_DT_INST_GET(n), 0); \
} \
\
static const struct soc_gpio_pin pins_twihs##n[] = ATMEL_SAM_DT_INST_PINS(n); \
\
static const struct i2c_sam_twihs_dev_cfg i2c##n##_sam_config = {\
.regs = (Twihs *)DT_INST_REG_ADDR(n), \
.irq_config = i2c##n##_sam_irq_config, \
.periph_id = DT_INST_PROP(n, peripheral_id), \
.irq_id = DT_INST_IRQN(n), \
.pin_list = pins_twihs##n, \
.pin_list_size = ARRAY_SIZE(pins_twihs##n), \
.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n), \
.bitrate = DT_INST_PROP(n, clock_frequency), \
}; \
\

2
dts/arm/atmel/sam3x.dtsi
View file

@ -73,7 +73,6 @@
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
pinctrl-0 = <&pa18a_twi0_twck0 &pa17a_twi0_twd0>;
};
twi1: i2c@40090000 {
@ -86,7 +85,6 @@
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
pinctrl-0 = <&pb13a_twi1_twck1 &pb12a_twi1_twd1>;
};
uart: uart@400e0800 {

2
dts/arm/atmel/sam4e.dtsi
View file

@ -80,7 +80,6 @@
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
pinctrl-0 = <&pa4a_twi0_twck0 &pa3a_twi0_twd0>;
};
twi1: i2c@400ac000 {
@ -93,7 +92,6 @@
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
pinctrl-0 = <&pb5a_twi1_twck1 &pb4a_twi1_twd1>;
};
spi0: spi@40088000 {

4
dts/arm/atmel/sam4l.dtsi
View file

@ -79,7 +79,6 @@
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
pinctrl-0 = <&pa23b_twi0_twd0 &pa24b_twi0_twck0>;
};
twim1: twim@4001c000 {
compatible = "atmel,sam-i2c-twim";
@ -91,7 +90,6 @@
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
pinctrl-0 = <&pb0a_twi1_twd1 &pb1a_twi1_twck1>;
};
twim2: twim@40078000 {
compatible = "atmel,sam-i2c-twim";
@ -103,7 +101,6 @@
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
pinctrl-0 = <&pa21e_twi2_twd2 &pa22e_twi2_twck2>;
};
twim3: twim@4007c000 {
compatible = "atmel,sam-i2c-twim";
@ -115,7 +112,6 @@
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
pinctrl-0 = <&pb14c_twi3_twd3 &pb15c_twi3_twck3>;
};
spi0: spi@40008000 {

2
dts/arm/atmel/sam4s.dtsi
View file

@ -81,7 +81,6 @@
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
pinctrl-0 = <&pa4a_twi0_twck0 &pa3a_twi0_twd0>;
};
twi1: i2c@4001c000 {
@ -94,7 +93,6 @@
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
pinctrl-0 = <&pb5a_twi1_twck1 &pb4a_twi1_twd1>;
};
spi0: spi@40008000 {

3
dts/arm/atmel/same70.dtsi
View file

@ -87,7 +87,6 @@
peripheral-id = <19>;
label = "I2C_0";
status = "disabled";
pinctrl-0 = <&pa4a_twihs0_twck0 &pa3a_twihs0_twd0>;
};
twihs1: i2c@4001c000 {
@ -100,7 +99,6 @@
peripheral-id = <20>;
label = "I2C_1";
status = "disabled";
pinctrl-0 = <&pb5a_twihs1_twck1 &pb4a_twihs1_twd1>;
};
twihs2: i2c@40060000 {
@ -113,7 +111,6 @@
peripheral-id = <41>;
label = "I2C_2";
status = "disabled";
pinctrl-0 = <&pd28c_twihs2_twck2 &pd27c_twihs2_twd2>;
};
spi0: spi@40008000 {

16
dts/bindings/i2c/atmel,sam-i2c-twi.yaml
View file

@ -5,7 +5,9 @@ description: Atmel SAM Family I2C (TWI) node
compatible: "atmel,sam-i2c-twi"
include: i2c-controller.yaml
include:
- name: i2c-controller.yaml
- name: pinctrl-device.yaml
properties:
reg:
@ -18,15 +20,3 @@ properties:
type: int
description: peripheral ID
required: true
pinctrl-0:
type: phandles
required: true
description: |
PIO pin configuration for TWCK & TWD signals. We expect that
the phandles will reference pinctrl nodes. These nodes will
have a nodelabel that matches the Atmel SoC HAL defines and
be of the form p<port><pin><periph>_<inst>_<signal>.
For example the I2C on SAM3x would be
pinctrl-0 = <&pa18a_twi0_twck0 &pa17a_twi0_twd0>;

16
dts/bindings/i2c/atmel,sam-i2c-twihs.yaml
View file

@ -5,7 +5,9 @@ description: Atmel SAM Family I2C (TWIHS) node
compatible: "atmel,sam-i2c-twihs"
include: i2c-controller.yaml
include:
- name: i2c-controller.yaml
- name: pinctrl-device.yaml
properties:
reg:
@ -18,15 +20,3 @@ properties:
type: int
description: peripheral ID
required: true
pinctrl-0:
type: phandles
required: true
description: |
PIO pin configuration for TWCK & TWD signals. We expect that
the phandles will reference pinctrl nodes. These nodes will
have a nodelabel that matches the Atmel SoC HAL defines and
be of the form p<port><pin><periph>_<inst>_<signal>.
For example the I2C on SAME7x would be
pinctrl-0 = <&pa4a_twihs0_twck0 &pa3a_twihs0_twd0>;

16
dts/bindings/i2c/atmel,sam-i2c-twim.yaml
View file

@ -37,7 +37,9 @@ description: |
compatible: "atmel,sam-i2c-twim"
include: i2c-controller.yaml
include:
- name: i2c-controller.yaml
- name: pinctrl-device.yaml
properties:
reg:
@ -201,15 +203,3 @@ properties:
- 5 # 101
- 6 # 110
- 7 # 111
pinctrl-0:
type: phandles
required: true
description: |
GPIO pin configuration for TWCK & TWD signals. We expect that
the phandles will reference pinctrl nodes. These nodes will
have a nodelabel that matches the Atmel SoC HAL defines and
be of the form p<port><pin><periph>_<inst>_<signal>.
For example the I2C on SAM4L would be
pinctrl-0 = <&pb0a_twi1_twd1 &pb1a_twi1_twck1>;