zephyr: replace zephyr integer types with C99 types
git grep -l 'u\(8\|16\|32\|64\)_t' | \ xargs sed -i "s/u\(8\|16\|32\|64\)_t/uint\1_t/g" git grep -l 's\(8\|16\|32\|64\)_t' | \ xargs sed -i "s/s\(8\|16\|32\|64\)_t/int\1_t/g" Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit is contained in:
Kumar Gala
Kumar Gala
parent
ee6fa31af6
commit
a1b77fd589
2364 changed files with 32505 additions and 32505 deletions
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@ -58,11 +58,11 @@ static struct k_spinlock lock;
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#if SMP_TIMER_DRIVER
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volatile static u64_t last_time;
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volatile static u64_t start_time;
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volatile static uint64_t last_time;
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volatile static uint64_t start_time;
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#else
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static u32_t last_load;
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static uint32_t last_load;
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/*
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@ -75,13 +75,13 @@ static u32_t last_load;
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*
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* t = cycle_counter + elapsed();
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*/
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static u32_t cycle_count;
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static uint32_t cycle_count;
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/*
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* This local variable holds the amount of elapsed HW cycles
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* that have been announced to the kernel.
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*/
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static u32_t announced_cycles;
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static uint32_t announced_cycles;
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/*
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@ -93,7 +93,7 @@ static u32_t announced_cycles;
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* Each time cycle_count is updated with the value from overflow_cycles,
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* the overflow_cycles must be reset to zero.
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*/
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static volatile u32_t overflow_cycles;
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static volatile uint32_t overflow_cycles;
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#endif
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/**
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@ -102,7 +102,7 @@ static volatile u32_t overflow_cycles;
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*
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* @return Current Timer0 count
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*/
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static ALWAYS_INLINE u32_t timer0_count_register_get(void)
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static ALWAYS_INLINE uint32_t timer0_count_register_get(void)
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{
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return z_arc_v2_aux_reg_read(_ARC_V2_TMR0_COUNT);
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}
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@ -113,7 +113,7 @@ static ALWAYS_INLINE u32_t timer0_count_register_get(void)
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*
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* @return N/A
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*/
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static ALWAYS_INLINE void timer0_count_register_set(u32_t value)
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static ALWAYS_INLINE void timer0_count_register_set(uint32_t value)
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{
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z_arc_v2_aux_reg_write(_ARC_V2_TMR0_COUNT, value);
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}
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@ -124,7 +124,7 @@ static ALWAYS_INLINE void timer0_count_register_set(u32_t value)
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*
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* @return N/A
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*/
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static ALWAYS_INLINE u32_t timer0_control_register_get(void)
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static ALWAYS_INLINE uint32_t timer0_control_register_get(void)
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{
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return z_arc_v2_aux_reg_read(_ARC_V2_TMR0_CONTROL);
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}
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@ -135,7 +135,7 @@ static ALWAYS_INLINE u32_t timer0_control_register_get(void)
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*
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* @return N/A
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*/
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static ALWAYS_INLINE void timer0_control_register_set(u32_t value)
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static ALWAYS_INLINE void timer0_control_register_set(uint32_t value)
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{
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z_arc_v2_aux_reg_write(_ARC_V2_TMR0_CONTROL, value);
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}
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@ -146,7 +146,7 @@ static ALWAYS_INLINE void timer0_control_register_set(u32_t value)
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*
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* @return N/A
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*/
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static ALWAYS_INLINE u32_t timer0_limit_register_get(void)
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static ALWAYS_INLINE uint32_t timer0_limit_register_get(void)
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{
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return z_arc_v2_aux_reg_read(_ARC_V2_TMR0_LIMIT);
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}
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@ -157,7 +157,7 @@ static ALWAYS_INLINE u32_t timer0_limit_register_get(void)
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*
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* @return N/A
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*/
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static ALWAYS_INLINE void timer0_limit_register_set(u32_t count)
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static ALWAYS_INLINE void timer0_limit_register_set(uint32_t count)
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{
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z_arc_v2_aux_reg_write(_ARC_V2_TMR0_LIMIT, count);
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}
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@ -180,9 +180,9 @@ static ALWAYS_INLINE void timer0_limit_register_set(u32_t count)
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* - and until the current call of the function is completed.
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* - the function is invoked with interrupts disabled.
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*/
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static u32_t elapsed(void)
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static uint32_t elapsed(void)
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{
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u32_t val, ctrl;
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uint32_t val, ctrl;
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do {
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val = timer0_count_register_get();
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@ -222,10 +222,10 @@ static u32_t elapsed(void)
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static void timer_int_handler(void *unused)
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{
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ARG_UNUSED(unused);
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u32_t dticks;
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uint32_t dticks;
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#if defined(CONFIG_SMP) && CONFIG_MP_NUM_CPUS > 1
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u64_t curr_time;
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uint64_t curr_time;
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k_spinlock_key_t key;
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/* clear the IP bit of the control register */
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@ -250,7 +250,7 @@ static void timer_int_handler(void *unused)
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/* irq with higher priority may call z_clock_set_timeout
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* so need a lock here
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*/
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u32_t key;
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uint32_t key;
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key = arch_irq_lock();
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@ -314,7 +314,7 @@ int z_clock_driver_init(struct device *device)
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return 0;
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}
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void z_clock_set_timeout(s32_t ticks, bool idle)
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void z_clock_set_timeout(int32_t ticks, bool idle)
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{
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/* If the kernel allows us to miss tick announcements in idle,
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* then shut off the counter. (Note: we can assume if idle==true
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@ -334,8 +334,8 @@ void z_clock_set_timeout(s32_t ticks, bool idle)
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}
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#if defined(CONFIG_TICKLESS_KERNEL)
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u32_t delay;
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u32_t key;
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uint32_t delay;
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uint32_t key;
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ticks = MIN(MAX_TICKS, ticks);
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@ -366,10 +366,10 @@ void z_clock_set_timeout(s32_t ticks, bool idle)
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}
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#if defined(CONFIG_TICKLESS_KERNEL)
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u32_t delay;
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u32_t unannounced;
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uint32_t delay;
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uint32_t unannounced;
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ticks = MIN(MAX_TICKS, (u32_t)(MAX((s32_t)(ticks - 1), 0)));
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ticks = MIN(MAX_TICKS, (uint32_t)(MAX((int32_t)(ticks - 1), 0)));
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k_spinlock_key_t key = k_spin_lock(&lock);
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@ -386,7 +386,7 @@ void z_clock_set_timeout(s32_t ticks, bool idle)
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/* normal case */
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unannounced = cycle_count - announced_cycles;
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if ((s32_t)unannounced < 0) {
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if ((int32_t)unannounced < 0) {
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/* We haven't announced for more than half the 32-bit
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* wrap duration, because new timeouts keep being set
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* before the existing one fires. Force an announce
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@ -417,13 +417,13 @@ void z_clock_set_timeout(s32_t ticks, bool idle)
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#endif
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}
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u32_t z_clock_elapsed(void)
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uint32_t z_clock_elapsed(void)
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{
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if (!TICKLESS) {
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return 0;
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}
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u32_t cyc;
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uint32_t cyc;
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k_spinlock_key_t key = k_spin_lock(&lock);
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#if SMP_TIMER_DRIVER
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@ -437,13 +437,13 @@ u32_t z_clock_elapsed(void)
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return cyc / CYC_PER_TICK;
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}
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u32_t z_timer_cycle_get_32(void)
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uint32_t z_timer_cycle_get_32(void)
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{
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#if SMP_TIMER_DRIVER
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return z_arc_connect_gfrc_read() - start_time;
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#else
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k_spinlock_key_t key = k_spin_lock(&lock);
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u32_t ret = elapsed() + cycle_count;
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uint32_t ret = elapsed() + cycle_count;
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k_spin_unlock(&lock, key);
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return ret;
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