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zephyr: replace zephyr integer types with C99 types

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git grep -l 'u\(8\|16\|32\|64\)_t' | \
		xargs sed -i "s/u\(8\|16\|32\|64\)_t/uint\1_t/g"
	git grep -l 's\(8\|16\|32\|64\)_t' | \
		xargs sed -i "s/s\(8\|16\|32\|64\)_t/int\1_t/g"

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit is contained in:
Kumar Gala 2020-05-27 11:26:57 -05:00 • committed by Kumar Gala
commit a1b77fd589
2364 changed files with 32505 additions and 32505 deletions
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52
drivers/pwm/pwm_nrf5_sw.c
View file

@ -26,27 +26,27 @@ LOG_MODULE_REGISTER(pwm_nrf5_sw);
struct pwm_config {
NRF_TIMER_Type *timer;
u8_t gpiote_base;
u8_t ppi_base;
u8_t map_size;
u8_t prescaler;
uint8_t gpiote_base;
uint8_t ppi_base;
uint8_t map_size;
uint8_t prescaler;
};
struct chan_map {
u32_t pwm;
u32_t pulse_cycles;
uint32_t pwm;
uint32_t pulse_cycles;
};
struct pwm_data {
u32_t period_cycles;
uint32_t period_cycles;
struct chan_map map[PWM_0_MAP_SIZE];
};
static u32_t pwm_period_check(struct pwm_data *data, u8_t map_size,
u32_t pwm, u32_t period_cycles,
u32_t pulse_cycles)
static uint32_t pwm_period_check(struct pwm_data *data, uint8_t map_size,
uint32_t pwm, uint32_t period_cycles,
uint32_t pulse_cycles)
{
u8_t i;
uint8_t i;
/* allow 0% and 100% duty cycle, as it does not use PWM. */
if ((pulse_cycles == 0U) || (pulse_cycles == period_cycles)) {
@ -65,10 +65,10 @@ static u32_t pwm_period_check(struct pwm_data *data, u8_t map_size,
return 0;
}
static u8_t pwm_channel_map(struct pwm_data *data, u8_t map_size,
u32_t pwm)
static uint8_t pwm_channel_map(struct pwm_data *data, uint8_t map_size,
uint32_t pwm)
{
u8_t i;
uint8_t i;
/* find pin, if already present */
for (i = 0U; i < map_size; i++) {
@ -88,17 +88,17 @@ static u8_t pwm_channel_map(struct pwm_data *data, u8_t map_size,
return i;
}
static int pwm_nrf5_sw_pin_set(struct device *dev, u32_t pwm,
u32_t period_cycles, u32_t pulse_cycles,
static int pwm_nrf5_sw_pin_set(struct device *dev, uint32_t pwm,
uint32_t period_cycles, uint32_t pulse_cycles,
pwm_flags_t flags)
{
const struct pwm_config *config;
NRF_TIMER_Type *timer;
struct pwm_data *data;
u8_t ppi_index;
u8_t channel;
u16_t div;
u32_t ret;
uint8_t ppi_index;
uint8_t channel;
uint16_t div;
uint32_t ret;
config = (const struct pwm_config *)dev->config_info;
timer = config->timer;
@ -172,14 +172,14 @@ static int pwm_nrf5_sw_pin_set(struct device *dev, u32_t pwm,
(pwm << 8);
/* setup PPI */
NRF_PPI->CH[ppi_index].EEP = (u32_t)
NRF_PPI->CH[ppi_index].EEP = (uint32_t)
&(timer->EVENTS_COMPARE[channel]);
NRF_PPI->CH[ppi_index].TEP = (u32_t)
NRF_PPI->CH[ppi_index].TEP = (uint32_t)
&(NRF_GPIOTE->TASKS_OUT[channel]);
NRF_PPI->CH[ppi_index + 1].EEP = (u32_t)
NRF_PPI->CH[ppi_index + 1].EEP = (uint32_t)
&(timer->EVENTS_COMPARE[
config->map_size]);
NRF_PPI->CH[ppi_index + 1].TEP = (u32_t)
NRF_PPI->CH[ppi_index + 1].TEP = (uint32_t)
&(NRF_GPIOTE->TASKS_OUT[channel]);
NRF_PPI->CHENSET = BIT(ppi_index) | BIT(ppi_index + 1);
@ -213,8 +213,8 @@ pin_set_pwm_off:
return 0;
}
static int pwm_nrf5_sw_get_cycles_per_sec(struct device *dev, u32_t pwm,
u64_t *cycles)
static int pwm_nrf5_sw_get_cycles_per_sec(struct device *dev, uint32_t pwm,
uint64_t *cycles)
{
const struct pwm_config *config;