michaelh/zephyr
1
0
Fork 0
Code Releases Activity

zephyr: replace zephyr integer types with C99 types

Browse source 
git grep -l 'u\(8\|16\|32\|64\)_t' | \
		xargs sed -i "s/u\(8\|16\|32\|64\)_t/uint\1_t/g"
	git grep -l 's\(8\|16\|32\|64\)_t' | \
		xargs sed -i "s/s\(8\|16\|32\|64\)_t/int\1_t/g"

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit is contained in:
Kumar Gala 2020-05-27 11:26:57 -05:00 • committed by Kumar Gala
commit a1b77fd589
2364 changed files with 32505 additions and 32505 deletions
Download patch file Download diff file Expand all files Collapse all files

50
drivers/i2s/i2s_ll_stm32.c
View file

@ -24,9 +24,9 @@ LOG_MODULE_REGISTER(i2s_ll_stm32);
*/
#if 0
#define DCACHE_INVALIDATE(addr, size) \
SCB_InvalidateDCache_by_Addr((u32_t *)addr, size)
SCB_InvalidateDCache_by_Addr((uint32_t *)addr, size)
#define DCACHE_CLEAN(addr, size) \
SCB_CleanDCache_by_Addr((u32_t *)addr, size)
SCB_CleanDCache_by_Addr((uint32_t *)addr, size)
#else
#define DCACHE_INVALIDATE(addr, size) {; }
#define DCACHE_CLEAN(addr, size) {; }
@ -34,7 +34,7 @@ LOG_MODULE_REGISTER(i2s_ll_stm32);
#define MODULO_INC(val, max) { val = (++val < max) ? val : 0; }
static unsigned int div_round_closest(u32_t dividend, u32_t divisor)
static unsigned int div_round_closest(uint32_t dividend, uint32_t divisor)
{
return (dividend + (divisor / 2U)) / divisor;
}
@ -68,7 +68,7 @@ static int queue_get(struct ring_buf *rb, void **mem_block, size_t *size)
*/
static int queue_put(struct ring_buf *rb, void *mem_block, size_t size)
{
u16_t head_next;
uint16_t head_next;
unsigned int key;
key = irq_lock();
@ -111,18 +111,18 @@ static int i2s_stm32_enable_clock(struct device *dev)
#ifdef CONFIG_I2S_STM32_USE_PLLI2S_ENABLE
#define PLLI2S_MAX_MS_TIME 1 /* PLLI2S lock time is 300us max */
static u16_t plli2s_ms_count;
static uint16_t plli2s_ms_count;
#define z_pllr(v) LL_RCC_PLLI2SR_DIV_ ## v
#define pllr(v) z_pllr(v)
#endif
static int i2s_stm32_set_clock(struct device *dev, u32_t bit_clk_freq)
static int i2s_stm32_set_clock(struct device *dev, uint32_t bit_clk_freq)
{
const struct i2s_stm32_cfg *cfg = DEV_CFG(dev);
u32_t pll_src = LL_RCC_PLL_GetMainSource();
uint32_t pll_src = LL_RCC_PLL_GetMainSource();
int freq_in;
u8_t i2s_div, i2s_odd;
uint8_t i2s_div, i2s_odd;
freq_in = (pll_src == LL_RCC_PLLSOURCE_HSI) ?
HSI_VALUE : CONFIG_CLOCK_STM32_HSE_CLOCK;
@ -183,7 +183,7 @@ static int i2s_stm32_configure(struct device *dev, enum i2s_dir dir,
const struct i2s_stm32_cfg *const cfg = DEV_CFG(dev);
struct i2s_stm32_data *const dev_data = DEV_DATA(dev);
struct stream *stream;
u32_t bit_clk_freq;
uint32_t bit_clk_freq;
int ret;
if (dir == I2S_DIR_RX) {
@ -433,13 +433,13 @@ static const struct i2s_driver_api i2s_stm32_driver_api = {
static struct device *active_dma_rx_channel[STM32_DMA_NUM_CHANNELS];
static struct device *active_dma_tx_channel[STM32_DMA_NUM_CHANNELS];
static int reload_dma(struct device *dev_dma, u32_t channel,
static int reload_dma(struct device *dev_dma, uint32_t channel,
struct dma_config *dcfg, void *src, void *dst,
u32_t blk_size)
uint32_t blk_size)
{
int ret;
ret = dma_reload(dev_dma, channel, (u32_t)src, (u32_t)dst, blk_size);
ret = dma_reload(dev_dma, channel, (uint32_t)src, (uint32_t)dst, blk_size);
if (ret < 0) {
return ret;
}
@ -449,19 +449,19 @@ static int reload_dma(struct device *dev_dma, u32_t channel,
return ret;
}
static int start_dma(struct device *dev_dma, u32_t channel,
static int start_dma(struct device *dev_dma, uint32_t channel,
struct dma_config *dcfg, void *src,
bool src_addr_increment, void *dst,
bool dst_addr_increment, u8_t fifo_threshold,
u32_t blk_size)
bool dst_addr_increment, uint8_t fifo_threshold,
uint32_t blk_size)
{
struct dma_block_config blk_cfg;
int ret;
memset(&blk_cfg, 0, sizeof(blk_cfg));
blk_cfg.block_size = blk_size;
blk_cfg.source_address = (u32_t)src;
blk_cfg.dest_address = (u32_t)dst;
blk_cfg.source_address = (uint32_t)src;
blk_cfg.dest_address = (uint32_t)dst;
if (src_addr_increment) {
blk_cfg.source_addr_adj = DMA_ADDR_ADJ_INCREMENT;
} else {
@ -486,13 +486,13 @@ static int start_dma(struct device *dev_dma, u32_t channel,
return ret;
}
static struct device *get_dev_from_rx_dma_channel(u32_t dma_channel);
static struct device *get_dev_from_tx_dma_channel(u32_t dma_channel);
static struct device *get_dev_from_rx_dma_channel(uint32_t dma_channel);
static struct device *get_dev_from_tx_dma_channel(uint32_t dma_channel);
static void rx_stream_disable(struct stream *stream, struct device *dev);
static void tx_stream_disable(struct stream *stream, struct device *dev);
/* This function is executed in the interrupt context */
static void dma_rx_callback(void *arg, u32_t channel, int status)
static void dma_rx_callback(void *arg, uint32_t channel, int status)
{
struct device *dev = get_dev_from_rx_dma_channel(channel);
const struct i2s_stm32_cfg *cfg = DEV_CFG(dev);
@ -558,7 +558,7 @@ rx_disable:
rx_stream_disable(stream, dev);
}
static void dma_tx_callback(void *arg, u32_t channel, int status)
static void dma_tx_callback(void *arg, uint32_t channel, int status)
{
struct device *dev = get_dev_from_tx_dma_channel(channel);
const struct i2s_stm32_cfg *cfg = DEV_CFG(dev);
@ -623,8 +623,8 @@ tx_disable:
tx_stream_disable(stream, dev);
}
static u32_t i2s_stm32_irq_count;
static u32_t i2s_stm32_irq_ovr_count;
static uint32_t i2s_stm32_irq_count;
static uint32_t i2s_stm32_irq_ovr_count;
static void i2s_stm32_isr(void *arg)
{
@ -839,12 +839,12 @@ static void tx_queue_drop(struct stream *stream)
}
}
static struct device *get_dev_from_rx_dma_channel(u32_t dma_channel)
static struct device *get_dev_from_rx_dma_channel(uint32_t dma_channel)
{
return active_dma_rx_channel[dma_channel];
}
static struct device *get_dev_from_tx_dma_channel(u32_t dma_channel)
static struct device *get_dev_from_tx_dma_channel(uint32_t dma_channel)
{
return active_dma_tx_channel[dma_channel];
}