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zephyr: replace zephyr integer types with C99 types

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git grep -l 'u\(8\|16\|32\|64\)_t' | \
		xargs sed -i "s/u\(8\|16\|32\|64\)_t/uint\1_t/g"
	git grep -l 's\(8\|16\|32\|64\)_t' | \
		xargs sed -i "s/s\(8\|16\|32\|64\)_t/int\1_t/g"

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit is contained in:
Kumar Gala 2020-05-27 11:26:57 -05:00 • committed by Kumar Gala
commit a1b77fd589
2364 changed files with 32505 additions and 32505 deletions
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50
drivers/gpio/gpio_intel_apl.c
View file

@ -106,17 +106,17 @@ BUILD_ASSERT(DT_INST_IRQN(0) == 14);
struct gpio_intel_apl_config {
/* gpio_driver_config needs to be first */
struct gpio_driver_config common;
u32_t reg_base;
uint32_t reg_base;
u8_t pin_offset;
u8_t num_pins;
uint8_t pin_offset;
uint8_t num_pins;
};
struct gpio_intel_apl_data {
/* gpio_driver_data needs to be first */
struct gpio_driver_data common;
/* Pad base address */
u32_t pad_base;
uint32_t pad_base;
sys_slist_t cb;
};
@ -126,15 +126,15 @@ struct gpio_intel_apl_data {
* @brief Check if host has permission to alter this GPIO pin.
*
* @param "struct device *dev" Device struct
* @param "u32_t raw_pin" Raw GPIO pin
* @param "uint32_t raw_pin" Raw GPIO pin
*
* @return true if host owns the GPIO pin, false otherwise
*/
static bool check_perm(struct device *dev, u32_t raw_pin)
static bool check_perm(struct device *dev, uint32_t raw_pin)
{
const struct gpio_intel_apl_config *cfg = dev->config_info;
struct gpio_intel_apl_data *data = dev->driver_data;
u32_t offset, val;
uint32_t offset, val;
/* First is to establish that host software owns the pin */
@ -179,7 +179,7 @@ static void gpio_intel_apl_isr(void *arg)
const struct gpio_intel_apl_config *cfg;
struct gpio_intel_apl_data *data;
struct gpio_callback *cb, *tmp;
u32_t reg, int_sts, cur_mask, acc_mask;
uint32_t reg, int_sts, cur_mask, acc_mask;
int isr_dev;
for (isr_dev = 0; isr_dev < nr_isr_devs; ++isr_dev) {
@ -211,7 +211,7 @@ static int gpio_intel_apl_config(struct device *dev,
{
const struct gpio_intel_apl_config *cfg = dev->config_info;
struct gpio_intel_apl_data *data = dev->driver_data;
u32_t raw_pin, reg, cfg0, cfg1;
uint32_t raw_pin, reg, cfg0, cfg1;
/* Only support push-pull mode */
if ((flags & GPIO_SINGLE_ENDED) != 0U) {
@ -286,8 +286,8 @@ static int gpio_intel_apl_pin_interrupt_configure(struct device *dev,
{
const struct gpio_intel_apl_config *cfg = dev->config_info;
struct gpio_intel_apl_data *data = dev->driver_data;
u32_t raw_pin, cfg0, cfg1;
u32_t reg, reg_en, reg_sts;
uint32_t raw_pin, cfg0, cfg1;
uint32_t reg, reg_en, reg_sts;
/* no double-edge triggering according to data sheet */
if (trig == GPIO_INT_TRIG_BOTH) {
@ -384,7 +384,7 @@ static int gpio_intel_apl_enable_callback(struct device *dev,
gpio_pin_t pin)
{
const struct gpio_intel_apl_config *cfg = dev->config_info;
u32_t raw_pin, reg;
uint32_t raw_pin, reg;
pin = k_array_index_sanitize(pin, cfg->num_pins + 1);
@ -409,7 +409,7 @@ static int gpio_intel_apl_disable_callback(struct device *dev,
gpio_pin_t pin)
{
const struct gpio_intel_apl_config *cfg = dev->config_info;
u32_t raw_pin, reg;
uint32_t raw_pin, reg;
pin = k_array_index_sanitize(pin, cfg->num_pins + 1);
@ -426,12 +426,12 @@ static int gpio_intel_apl_disable_callback(struct device *dev,
return 0;
}
static int port_get_raw(struct device *dev, u32_t mask, u32_t *value,
static int port_get_raw(struct device *dev, uint32_t mask, uint32_t *value,
bool read_tx)
{
const struct gpio_intel_apl_config *cfg = dev->config_info;
struct gpio_intel_apl_data *data = dev->driver_data;
u32_t pin, raw_pin, reg_addr, reg_val, cmp;
uint32_t pin, raw_pin, reg_addr, reg_val, cmp;
if (read_tx) {
cmp = PAD_CFG0_TXSTATE;
@ -466,11 +466,11 @@ static int port_get_raw(struct device *dev, u32_t mask, u32_t *value,
return 0;
}
static int port_set_raw(struct device *dev, u32_t mask, u32_t value)
static int port_set_raw(struct device *dev, uint32_t mask, uint32_t value)
{
const struct gpio_intel_apl_config *cfg = dev->config_info;
struct gpio_intel_apl_data *data = dev->driver_data;
u32_t pin, raw_pin, reg_addr, reg_val;
uint32_t pin, raw_pin, reg_addr, reg_val;
while (mask != 0) {
pin = find_lsb_set(mask) - 1;
@ -502,10 +502,10 @@ static int port_set_raw(struct device *dev, u32_t mask, u32_t value)
return 0;
}
static int gpio_intel_apl_port_set_masked_raw(struct device *dev, u32_t mask,
u32_t value)
static int gpio_intel_apl_port_set_masked_raw(struct device *dev, uint32_t mask,
uint32_t value)
{
u32_t port_val;
uint32_t port_val;
port_get_raw(dev, mask, &port_val, true);
@ -516,19 +516,19 @@ static int gpio_intel_apl_port_set_masked_raw(struct device *dev, u32_t mask,
return 0;
}
static int gpio_intel_apl_port_set_bits_raw(struct device *dev, u32_t mask)
static int gpio_intel_apl_port_set_bits_raw(struct device *dev, uint32_t mask)
{
return gpio_intel_apl_port_set_masked_raw(dev, mask, mask);
}
static int gpio_intel_apl_port_clear_bits_raw(struct device *dev, u32_t mask)
static int gpio_intel_apl_port_clear_bits_raw(struct device *dev, uint32_t mask)
{
return gpio_intel_apl_port_set_masked_raw(dev, mask, 0);
}
static int gpio_intel_apl_port_toggle_bits(struct device *dev, u32_t mask)
static int gpio_intel_apl_port_toggle_bits(struct device *dev, uint32_t mask)
{
u32_t port_val;
uint32_t port_val;
port_get_raw(dev, mask, &port_val, true);
@ -539,7 +539,7 @@ static int gpio_intel_apl_port_toggle_bits(struct device *dev, u32_t mask)
return 0;
}
static int gpio_intel_apl_port_get_raw(struct device *dev, u32_t *value)
static int gpio_intel_apl_port_get_raw(struct device *dev, uint32_t *value)
{
return port_get_raw(dev, 0xFFFFFFFF, value, false);
}