zephyr: replace zephyr integer types with C99 types
git grep -l 'u\(8\|16\|32\|64\)_t' | \ xargs sed -i "s/u\(8\|16\|32\|64\)_t/uint\1_t/g" git grep -l 's\(8\|16\|32\|64\)_t' | \ xargs sed -i "s/s\(8\|16\|32\|64\)_t/int\1_t/g" Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit is contained in:
Kumar Gala
Kumar Gala
parent
ee6fa31af6
commit
a1b77fd589
2364 changed files with 32505 additions and 32505 deletions
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@ -56,7 +56,7 @@ static inline void can_work_buffer_init(struct can_frame_buffer *buffer)
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static inline int can_work_buffer_put(struct zcan_frame *frame,
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struct can_frame_buffer *buffer)
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{
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u16_t next_head = WORK_BUF_MOD_SIZE(buffer->head + 1);
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uint16_t next_head = WORK_BUF_MOD_SIZE(buffer->head + 1);
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if (buffer->head == WORK_BUF_FULL) {
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return -1;
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@ -87,7 +87,7 @@ struct zcan_frame *can_work_buffer_get_next(struct can_frame_buffer *buffer)
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static inline void can_work_buffer_free_next(struct can_frame_buffer *buffer)
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{
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u16_t next_tail = WORK_BUF_MOD_SIZE(buffer->tail + 1);
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uint16_t next_tail = WORK_BUF_MOD_SIZE(buffer->tail + 1);
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if (buffer->head == buffer->tail) {
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return;
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@ -8,13 +8,13 @@
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#include <drivers/can.h>
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static inline int z_vrfy_can_configure(struct device *dev, enum can_mode mode,
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u32_t bitrate)
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uint32_t bitrate)
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{
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Z_OOPS(Z_SYSCALL_DRIVER_CAN(dev, configure));
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return z_impl_can_configure((struct device *)dev, (enum can_mode)mode,
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(u32_t)bitrate);
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(uint32_t)bitrate);
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}
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#include <syscalls/can_configure_mrsh.c>
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@ -46,7 +46,7 @@ static void dispatch_frame(const struct zcan_frame *frame,
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static inline int check_filter_match(const struct zcan_frame *frame,
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const struct zcan_filter *filter)
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{
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u32_t id, mask, frame_id;
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uint32_t id, mask, frame_id;
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frame_id = frame->id_type == CAN_STANDARD_IDENTIFIER ?
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frame->std_id : frame->ext_id;
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@ -193,7 +193,7 @@ void can_loopback_detach(struct device *dev, int filter_id)
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}
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int can_loopback_configure(struct device *dev, enum can_mode mode,
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u32_t bitrate)
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uint32_t bitrate)
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{
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struct can_loopback_data *data = DEV_DATA(dev);
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@ -19,7 +19,7 @@ LOG_MODULE_REGISTER(mcp2515_can);
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static int mcp2515_cmd_soft_reset(struct device *dev)
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{
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u8_t cmd_buf[] = { MCP2515_OPCODE_RESET };
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uint8_t cmd_buf[] = { MCP2515_OPCODE_RESET };
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const struct spi_buf tx_buf = {
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.buf = cmd_buf, .len = sizeof(cmd_buf),
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@ -31,10 +31,10 @@ static int mcp2515_cmd_soft_reset(struct device *dev)
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return spi_write(DEV_DATA(dev)->spi, &DEV_DATA(dev)->spi_cfg, &tx);
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}
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static int mcp2515_cmd_bit_modify(struct device *dev, u8_t reg_addr, u8_t mask,
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u8_t data)
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static int mcp2515_cmd_bit_modify(struct device *dev, uint8_t reg_addr, uint8_t mask,
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uint8_t data)
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{
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u8_t cmd_buf[] = { MCP2515_OPCODE_BIT_MODIFY, reg_addr, mask, data };
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uint8_t cmd_buf[] = { MCP2515_OPCODE_BIT_MODIFY, reg_addr, mask, data };
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const struct spi_buf tx_buf = {
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.buf = cmd_buf, .len = sizeof(cmd_buf),
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@ -46,10 +46,10 @@ static int mcp2515_cmd_bit_modify(struct device *dev, u8_t reg_addr, u8_t mask,
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return spi_write(DEV_DATA(dev)->spi, &DEV_DATA(dev)->spi_cfg, &tx);
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}
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static int mcp2515_cmd_write_reg(struct device *dev, u8_t reg_addr,
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u8_t *buf_data, u8_t buf_len)
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static int mcp2515_cmd_write_reg(struct device *dev, uint8_t reg_addr,
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uint8_t *buf_data, uint8_t buf_len)
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{
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u8_t cmd_buf[] = { MCP2515_OPCODE_WRITE, reg_addr };
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uint8_t cmd_buf[] = { MCP2515_OPCODE_WRITE, reg_addr };
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struct spi_buf tx_buf[] = {
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{ .buf = cmd_buf, .len = sizeof(cmd_buf) },
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@ -76,12 +76,12 @@ static int mcp2515_cmd_write_reg(struct device *dev, u8_t reg_addr,
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* 4: TX Buffer 2, Start at TXB2SIDH (0x51)
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* 5: TX Buffer 2, Start at TXB2D0 (0x56)
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*/
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static int mcp2515_cmd_load_tx_buffer(struct device *dev, u8_t abc,
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u8_t *buf_data, u8_t buf_len)
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static int mcp2515_cmd_load_tx_buffer(struct device *dev, uint8_t abc,
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uint8_t *buf_data, uint8_t buf_len)
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{
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__ASSERT(abc <= 5, "abc <= 5");
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u8_t cmd_buf[] = { MCP2515_OPCODE_LOAD_TX_BUFFER | abc };
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uint8_t cmd_buf[] = { MCP2515_OPCODE_LOAD_TX_BUFFER | abc };
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struct spi_buf tx_buf[] = {
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{ .buf = cmd_buf, .len = sizeof(cmd_buf) },
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@ -101,11 +101,11 @@ static int mcp2515_cmd_load_tx_buffer(struct device *dev, u8_t abc,
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* opcode that respectively initiate transmission for buffers TXB0, TXB1 and
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* TXB2.
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*/
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static int mcp2515_cmd_rts(struct device *dev, u8_t nnn)
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static int mcp2515_cmd_rts(struct device *dev, uint8_t nnn)
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{
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__ASSERT(nnn < BIT(MCP2515_TX_CNT), "nnn < BIT(MCP2515_TX_CNT)");
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u8_t cmd_buf[] = { MCP2515_OPCODE_RTS | nnn };
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uint8_t cmd_buf[] = { MCP2515_OPCODE_RTS | nnn };
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struct spi_buf tx_buf[] = {
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{ .buf = cmd_buf, .len = sizeof(cmd_buf) }
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@ -117,10 +117,10 @@ static int mcp2515_cmd_rts(struct device *dev, u8_t nnn)
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return spi_write(DEV_DATA(dev)->spi, &DEV_DATA(dev)->spi_cfg, &tx);
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}
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static int mcp2515_cmd_read_reg(struct device *dev, u8_t reg_addr,
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u8_t *buf_data, u8_t buf_len)
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static int mcp2515_cmd_read_reg(struct device *dev, uint8_t reg_addr,
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uint8_t *buf_data, uint8_t buf_len)
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{
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u8_t cmd_buf[] = { MCP2515_OPCODE_READ, reg_addr };
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uint8_t cmd_buf[] = { MCP2515_OPCODE_READ, reg_addr };
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struct spi_buf tx_buf[] = {
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{ .buf = cmd_buf, .len = sizeof(cmd_buf) },
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@ -152,12 +152,12 @@ static int mcp2515_cmd_read_reg(struct device *dev, u8_t reg_addr,
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* 2: Receive Buffer 1, Start at RXB1SIDH (0x71)
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* 3: Receive Buffer 1, Start at RXB1D0 (0x76)
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*/
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static int mcp2515_cmd_read_rx_buffer(struct device *dev, u8_t nm,
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u8_t *buf_data, u8_t buf_len)
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static int mcp2515_cmd_read_rx_buffer(struct device *dev, uint8_t nm,
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uint8_t *buf_data, uint8_t buf_len)
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{
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__ASSERT(nm <= 0x03, "nm <= 0x03");
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u8_t cmd_buf[] = { MCP2515_OPCODE_READ_RX_BUFFER | (nm << 1) };
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uint8_t cmd_buf[] = { MCP2515_OPCODE_READ_RX_BUFFER | (nm << 1) };
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struct spi_buf tx_buf[] = {
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{ .buf = cmd_buf, .len = sizeof(cmd_buf) },
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@ -178,7 +178,7 @@ static int mcp2515_cmd_read_rx_buffer(struct device *dev, u8_t nm,
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&tx, &rx);
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}
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static u8_t mcp2515_convert_canmode_to_mcp2515mode(enum can_mode mode)
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static uint8_t mcp2515_convert_canmode_to_mcp2515mode(enum can_mode mode)
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{
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switch (mode) {
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case CAN_NORMAL_MODE:
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@ -194,11 +194,11 @@ static u8_t mcp2515_convert_canmode_to_mcp2515mode(enum can_mode mode)
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}
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static void mcp2515_convert_zcanframe_to_mcp2515frame(const struct zcan_frame
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*source, u8_t *target)
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*source, uint8_t *target)
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{
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u8_t rtr;
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u8_t dlc;
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u8_t data_idx = 0U;
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uint8_t rtr;
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uint8_t dlc;
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uint8_t data_idx = 0U;
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if (source->id_type == CAN_STANDARD_IDENTIFIER) {
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target[MCP2515_FRAME_OFFSET_SIDH] = source->std_id >> 3;
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@ -224,10 +224,10 @@ static void mcp2515_convert_zcanframe_to_mcp2515frame(const struct zcan_frame
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}
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}
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static void mcp2515_convert_mcp2515frame_to_zcanframe(const u8_t *source,
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static void mcp2515_convert_mcp2515frame_to_zcanframe(const uint8_t *source,
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struct zcan_frame *target)
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{
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u8_t data_idx = 0U;
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uint8_t data_idx = 0U;
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if (source[MCP2515_FRAME_OFFSET_SIDL] & BIT(3)) {
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target->id_type = CAN_EXTENDED_IDENTIFIER;
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@ -253,9 +253,9 @@ static void mcp2515_convert_mcp2515frame_to_zcanframe(const u8_t *source,
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}
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}
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const int mcp2515_set_mode(struct device *dev, u8_t mcp2515_mode)
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const int mcp2515_set_mode(struct device *dev, uint8_t mcp2515_mode)
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{
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u8_t canstat;
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uint8_t canstat;
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mcp2515_cmd_bit_modify(dev, MCP2515_ADDR_CANCTRL,
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MCP2515_CANCTRL_MODE_MASK,
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@ -272,51 +272,51 @@ const int mcp2515_set_mode(struct device *dev, u8_t mcp2515_mode)
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}
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static int mcp2515_configure(struct device *dev, enum can_mode mode,
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u32_t bitrate)
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uint32_t bitrate)
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{
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const struct mcp2515_config *dev_cfg = DEV_CFG(dev);
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struct mcp2515_data *dev_data = DEV_DATA(dev);
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int ret;
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/* CNF3, CNF2, CNF1, CANINTE */
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u8_t config_buf[4];
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uint8_t config_buf[4];
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if (bitrate == 0) {
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bitrate = dev_cfg->bus_speed;
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}
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const u8_t bit_length = 1 + dev_cfg->tq_prop + dev_cfg->tq_bs1 +
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const uint8_t bit_length = 1 + dev_cfg->tq_prop + dev_cfg->tq_bs1 +
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dev_cfg->tq_bs2;
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/* CNF1; SJW<7:6> | BRP<5:0> */
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u8_t brp = (dev_cfg->osc_freq / (bit_length * bitrate * 2)) - 1;
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const u8_t sjw = (dev_cfg->tq_sjw - 1) << 6;
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u8_t cnf1 = sjw | brp;
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uint8_t brp = (dev_cfg->osc_freq / (bit_length * bitrate * 2)) - 1;
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const uint8_t sjw = (dev_cfg->tq_sjw - 1) << 6;
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uint8_t cnf1 = sjw | brp;
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/* CNF2; BTLMODE<7>|SAM<6>|PHSEG1<5:3>|PRSEG<2:0> */
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const u8_t btlmode = 1 << 7;
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const u8_t sam = 0 << 6;
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const u8_t phseg1 = (dev_cfg->tq_bs1 - 1) << 3;
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const u8_t prseg = (dev_cfg->tq_prop - 1);
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const uint8_t btlmode = 1 << 7;
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const uint8_t sam = 0 << 6;
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const uint8_t phseg1 = (dev_cfg->tq_bs1 - 1) << 3;
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const uint8_t prseg = (dev_cfg->tq_prop - 1);
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const u8_t cnf2 = btlmode | sam | phseg1 | prseg;
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const uint8_t cnf2 = btlmode | sam | phseg1 | prseg;
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/* CNF3; SOF<7>|WAKFIL<6>|UND<5:3>|PHSEG2<2:0> */
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const u8_t sof = 0 << 7;
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const u8_t wakfil = 0 << 6;
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const u8_t und = 0 << 3;
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const u8_t phseg2 = (dev_cfg->tq_bs2 - 1);
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const uint8_t sof = 0 << 7;
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const uint8_t wakfil = 0 << 6;
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const uint8_t und = 0 << 3;
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const uint8_t phseg2 = (dev_cfg->tq_bs2 - 1);
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const u8_t cnf3 = sof | wakfil | und | phseg2;
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const uint8_t cnf3 = sof | wakfil | und | phseg2;
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const u8_t caninte = MCP2515_INTE_RX0IE | MCP2515_INTE_RX1IE |
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const uint8_t caninte = MCP2515_INTE_RX0IE | MCP2515_INTE_RX1IE |
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MCP2515_INTE_TX0IE | MCP2515_INTE_TX1IE |
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MCP2515_INTE_TX2IE | MCP2515_INTE_ERRIE;
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/* Receive everything, filtering done in driver, RXB0 roll over into
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* RXB1 */
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const u8_t rx0_ctrl = BIT(6) | BIT(5) | BIT(2);
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const u8_t rx1_ctrl = BIT(6) | BIT(5);
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const uint8_t rx0_ctrl = BIT(6) | BIT(5) | BIT(2);
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const uint8_t rx1_ctrl = BIT(6) | BIT(5);
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__ASSERT((dev_cfg->tq_sjw >= 1) && (dev_cfg->tq_sjw <= 4),
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"1 <= SJW <= 4");
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@ -386,11 +386,11 @@ static int mcp2515_send(struct device *dev, const struct zcan_frame *msg,
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void *callback_arg)
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{
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struct mcp2515_data *dev_data = DEV_DATA(dev);
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u8_t tx_idx = 0U;
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u8_t abc;
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u8_t nnn;
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u8_t len;
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u8_t tx_frame[MCP2515_FRAME_LEN];
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uint8_t tx_idx = 0U;
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uint8_t abc;
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uint8_t nnn;
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uint8_t len;
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uint8_t tx_frame[MCP2515_FRAME_LEN];
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if (msg->dlc > CAN_MAX_DLC) {
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LOG_ERR("DLC of %d exceeds maximum (%d)",
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@ -494,7 +494,7 @@ static void mcp2515_register_state_change_isr(struct device *dev,
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dev_data->state_change_isr = isr;
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}
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static u8_t mcp2515_filter_match(struct zcan_frame *msg,
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static uint8_t mcp2515_filter_match(struct zcan_frame *msg,
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struct zcan_filter *filter)
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{
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if (msg->id_type != filter->id_type) {
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@ -521,7 +521,7 @@ static u8_t mcp2515_filter_match(struct zcan_frame *msg,
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static void mcp2515_rx_filter(struct device *dev, struct zcan_frame *msg)
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{
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struct mcp2515_data *dev_data = DEV_DATA(dev);
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u8_t filter_idx = 0U;
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uint8_t filter_idx = 0U;
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can_rx_callback_t callback;
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struct zcan_frame tmp_msg;
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@ -547,13 +547,13 @@ static void mcp2515_rx_filter(struct device *dev, struct zcan_frame *msg)
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k_mutex_unlock(&dev_data->mutex);
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}
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static void mcp2515_rx(struct device *dev, u8_t rx_idx)
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static void mcp2515_rx(struct device *dev, uint8_t rx_idx)
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{
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__ASSERT(rx_idx < MCP2515_RX_CNT, "rx_idx < MCP2515_RX_CNT");
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struct zcan_frame msg;
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u8_t rx_frame[MCP2515_FRAME_LEN];
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u8_t nm;
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uint8_t rx_frame[MCP2515_FRAME_LEN];
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uint8_t nm;
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/* Address Pointer selection */
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nm = 2 * rx_idx;
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@ -564,7 +564,7 @@ static void mcp2515_rx(struct device *dev, u8_t rx_idx)
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mcp2515_rx_filter(dev, &msg);
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}
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static void mcp2515_tx_done(struct device *dev, u8_t tx_idx)
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static void mcp2515_tx_done(struct device *dev, uint8_t tx_idx)
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{
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struct mcp2515_data *dev_data = DEV_DATA(dev);
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@ -583,8 +583,8 @@ static void mcp2515_tx_done(struct device *dev, u8_t tx_idx)
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static enum can_state mcp2515_get_state(struct device *dev,
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struct can_bus_err_cnt *err_cnt)
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{
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u8_t eflg;
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u8_t err_cnt_buf[2];
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uint8_t eflg;
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uint8_t err_cnt_buf[2];
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int ret;
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ret = mcp2515_cmd_read_reg(dev, MCP2515_ADDR_EFLG, &eflg, sizeof(eflg));
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@ -644,7 +644,7 @@ static void mcp2515_handle_interrupts(struct device *dev)
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const struct mcp2515_config *dev_cfg = DEV_CFG(dev);
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struct mcp2515_data *dev_data = DEV_DATA(dev);
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int ret;
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u8_t canintf;
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uint8_t canintf;
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/* Loop until INT pin is inactive (all interrupt flags handled) */
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while (1) {
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@ -718,7 +718,7 @@ static void mcp2515_int_thread(struct device *dev)
|
|||
}
|
||||
|
||||
static void mcp2515_int_gpio_callback(struct device *dev,
|
||||
struct gpio_callback *cb, u32_t pins)
|
||||
struct gpio_callback *cb, uint32_t pins)
|
||||
{
|
||||
struct mcp2515_data *dev_data =
|
||||
CONTAINER_OF(cb, struct mcp2515_data, int_gpio_cb);
|
||||
|
|
|
|||
|
|
@ -42,10 +42,10 @@ struct mcp2515_data {
|
|||
/* tx data */
|
||||
struct k_sem tx_sem;
|
||||
struct mcp2515_tx_cb tx_cb[MCP2515_TX_CNT];
|
||||
u8_t tx_busy_map;
|
||||
uint8_t tx_busy_map;
|
||||
|
||||
/* filter data */
|
||||
u32_t filter_usage;
|
||||
uint32_t filter_usage;
|
||||
can_rx_callback_t rx_cb[CONFIG_CAN_MCP2515_MAX_FILTER];
|
||||
void *cb_arg[CONFIG_CAN_MCP2515_MAX_FILTER];
|
||||
struct zcan_filter filter[CONFIG_CAN_MCP2515_MAX_FILTER];
|
||||
|
|
@ -59,24 +59,24 @@ struct mcp2515_data {
|
|||
struct mcp2515_config {
|
||||
/* spi configuration */
|
||||
const char *spi_port;
|
||||
u8_t spi_cs_pin;
|
||||
uint8_t spi_cs_pin;
|
||||
const char *spi_cs_port;
|
||||
u32_t spi_freq;
|
||||
u8_t spi_slave;
|
||||
uint32_t spi_freq;
|
||||
uint8_t spi_slave;
|
||||
|
||||
/* interrupt configuration */
|
||||
u8_t int_pin;
|
||||
uint8_t int_pin;
|
||||
const char *int_port;
|
||||
size_t int_thread_stack_size;
|
||||
int int_thread_priority;
|
||||
|
||||
/* CAN timing */
|
||||
u8_t tq_sjw;
|
||||
u8_t tq_prop;
|
||||
u8_t tq_bs1;
|
||||
u8_t tq_bs2;
|
||||
u32_t bus_speed;
|
||||
u32_t osc_freq;
|
||||
uint8_t tq_sjw;
|
||||
uint8_t tq_prop;
|
||||
uint8_t tq_bs1;
|
||||
uint8_t tq_bs2;
|
||||
uint32_t bus_speed;
|
||||
uint32_t osc_freq;
|
||||
};
|
||||
|
||||
/* MCP2515 Opcodes */
|
||||
|
|
|
|||
|
|
@ -45,9 +45,9 @@ LOG_MODULE_REGISTER(can_mcux_flexcan);
|
|||
|
||||
/* Convert from back from FLEXCAN IDs to Zephyr CAN IDs. */
|
||||
#define FLEXCAN_ID_TO_ZCAN_ID_STD(id) \
|
||||
((u32_t)((((u32_t)(id)) & CAN_ID_STD_MASK) >> CAN_ID_STD_SHIFT))
|
||||
((uint32_t)((((uint32_t)(id)) & CAN_ID_STD_MASK) >> CAN_ID_STD_SHIFT))
|
||||
#define FLEXCAN_ID_TO_ZCAN_ID_EXT(id) \
|
||||
((u32_t)((((u32_t)(id)) & (CAN_ID_STD_MASK | CAN_ID_EXT_MASK)) \
|
||||
((uint32_t)((((uint32_t)(id)) & (CAN_ID_STD_MASK | CAN_ID_EXT_MASK)) \
|
||||
>> CAN_ID_EXT_SHIFT))
|
||||
|
||||
struct mcux_flexcan_config {
|
||||
|
|
@ -55,11 +55,11 @@ struct mcux_flexcan_config {
|
|||
char *clock_name;
|
||||
clock_control_subsys_t clock_subsys;
|
||||
int clk_source;
|
||||
u32_t bitrate;
|
||||
u32_t sjw;
|
||||
u32_t prop_seg;
|
||||
u32_t phase_seg1;
|
||||
u32_t phase_seg2;
|
||||
uint32_t bitrate;
|
||||
uint32_t sjw;
|
||||
uint32_t prop_seg;
|
||||
uint32_t phase_seg1;
|
||||
uint32_t phase_seg2;
|
||||
void (*irq_config_func)(struct device *dev);
|
||||
};
|
||||
|
||||
|
|
@ -93,12 +93,12 @@ struct mcux_flexcan_data {
|
|||
};
|
||||
|
||||
static int mcux_flexcan_configure(struct device *dev, enum can_mode mode,
|
||||
u32_t bitrate)
|
||||
uint32_t bitrate)
|
||||
{
|
||||
const struct mcux_flexcan_config *config = dev->config_info;
|
||||
flexcan_config_t flexcan_config;
|
||||
struct device *clock_dev;
|
||||
u32_t clock_freq;
|
||||
uint32_t clock_freq;
|
||||
|
||||
clock_dev = device_get_binding(config->clock_name);
|
||||
if (clock_dev == NULL) {
|
||||
|
|
@ -185,7 +185,7 @@ static void mcux_flexcan_copy_frame_to_zframe(const flexcan_frame_t *src,
|
|||
|
||||
static void mcux_flexcan_copy_zfilter_to_mbconfig(const struct zcan_filter *src,
|
||||
flexcan_rx_mb_config_t *dest,
|
||||
u32_t *mask)
|
||||
uint32_t *mask)
|
||||
{
|
||||
if (src->id_type == CAN_STANDARD_IDENTIFIER) {
|
||||
dest->format = kFLEXCAN_FrameFormatStandard;
|
||||
|
|
@ -303,7 +303,7 @@ static int mcux_flexcan_attach_isr(struct device *dev, can_rx_callback_t isr,
|
|||
struct mcux_flexcan_data *data = dev->driver_data;
|
||||
flexcan_mb_transfer_t xfer;
|
||||
status_t status;
|
||||
u32_t mask;
|
||||
uint32_t mask;
|
||||
int alloc = CAN_NO_FREE_FILTER;
|
||||
int i;
|
||||
|
||||
|
|
@ -362,7 +362,7 @@ static enum can_state mcux_flexcan_get_state(struct device *dev,
|
|||
struct can_bus_err_cnt *err_cnt)
|
||||
{
|
||||
const struct mcux_flexcan_config *config = dev->config_info;
|
||||
u32_t status_flags;
|
||||
uint32_t status_flags;
|
||||
|
||||
if (err_cnt) {
|
||||
FLEXCAN_GetBusErrCount(config->base, &err_cnt->tx_err_cnt,
|
||||
|
|
@ -388,7 +388,7 @@ int mcux_flexcan_recover(struct device *dev, k_timeout_t timeout)
|
|||
{
|
||||
const struct mcux_flexcan_config *config = dev->config_info;
|
||||
int ret = 0;
|
||||
u64_t start_time;
|
||||
uint64_t start_time;
|
||||
|
||||
if (mcux_flexcan_get_state(dev, NULL) != CAN_BUS_OFF) {
|
||||
return 0;
|
||||
|
|
@ -441,7 +441,7 @@ static void mcux_flexcan_detach(struct device *dev, int filter_id)
|
|||
}
|
||||
|
||||
static inline void mcux_flexcan_transfer_error_status(struct device *dev,
|
||||
u32_t error)
|
||||
uint32_t error)
|
||||
{
|
||||
const struct mcux_flexcan_config *config = dev->config_info;
|
||||
struct mcux_flexcan_data *data = dev->driver_data;
|
||||
|
|
@ -518,7 +518,7 @@ static inline void mcux_flexcan_transfer_error_status(struct device *dev,
|
|||
}
|
||||
|
||||
static inline void mcux_flexcan_transfer_tx_idle(struct device *dev,
|
||||
u32_t mb)
|
||||
uint32_t mb)
|
||||
{
|
||||
struct mcux_flexcan_data *data = dev->driver_data;
|
||||
can_tx_callback_t function;
|
||||
|
|
@ -543,7 +543,7 @@ static inline void mcux_flexcan_transfer_tx_idle(struct device *dev,
|
|||
}
|
||||
|
||||
static inline void mcux_flexcan_transfer_rx_idle(struct device *dev,
|
||||
u32_t mb)
|
||||
uint32_t mb)
|
||||
{
|
||||
const struct mcux_flexcan_config *config = dev->config_info;
|
||||
struct mcux_flexcan_data *data = dev->driver_data;
|
||||
|
|
@ -580,7 +580,7 @@ static inline void mcux_flexcan_transfer_rx_idle(struct device *dev,
|
|||
|
||||
static void mcux_flexcan_transfer_callback(CAN_Type *base,
|
||||
flexcan_handle_t *handle,
|
||||
status_t status, u32_t result,
|
||||
status_t status, uint32_t result,
|
||||
void *userData)
|
||||
{
|
||||
struct device *dev = (struct device *)userData;
|
||||
|
|
|
|||
|
|
@ -42,21 +42,21 @@ struct mcast_filter_mapping *can_get_mcast_filter(struct net_can_context *ctx,
|
|||
return NULL;
|
||||
}
|
||||
|
||||
static inline u8_t can_get_frame_datalength(struct zcan_frame *frame)
|
||||
static inline uint8_t can_get_frame_datalength(struct zcan_frame *frame)
|
||||
{
|
||||
/* TODO: Needs update when CAN FD support is added */
|
||||
return frame->dlc;
|
||||
}
|
||||
|
||||
static inline u16_t can_get_lladdr_src(struct zcan_frame *frame)
|
||||
static inline uint16_t can_get_lladdr_src(struct zcan_frame *frame)
|
||||
{
|
||||
return (frame->ext_id >> CAN_NET_IF_ADDR_SRC_POS) &
|
||||
CAN_NET_IF_ADDR_MASK;
|
||||
}
|
||||
|
||||
static inline u16_t can_get_lladdr_dest(struct zcan_frame *frame)
|
||||
static inline uint16_t can_get_lladdr_dest(struct zcan_frame *frame)
|
||||
{
|
||||
u16_t addr = (frame->ext_id >> CAN_NET_IF_ADDR_DEST_POS) &
|
||||
uint16_t addr = (frame->ext_id >> CAN_NET_IF_ADDR_DEST_POS) &
|
||||
CAN_NET_IF_ADDR_MASK;
|
||||
|
||||
if (frame->ext_id & CAN_NET_IF_ADDR_MCAST_MASK) {
|
||||
|
|
@ -78,14 +78,14 @@ static inline void can_set_lladdr(struct net_pkt *pkt, struct zcan_frame *frame)
|
|||
net_pkt_lladdr_dst(pkt)->len = sizeof(struct net_canbus_lladdr);
|
||||
net_pkt_lladdr_dst(pkt)->type = NET_LINK_CANBUS;
|
||||
net_buf_add_be16(buf, can_get_lladdr_dest(frame));
|
||||
net_buf_pull(buf, sizeof(u16_t));
|
||||
net_buf_pull(buf, sizeof(uint16_t));
|
||||
|
||||
/* Do the same as above for the source address */
|
||||
net_pkt_lladdr_src(pkt)->addr = buf->data;
|
||||
net_pkt_lladdr_src(pkt)->len = sizeof(struct net_canbus_lladdr);
|
||||
net_pkt_lladdr_src(pkt)->type = NET_LINK_CANBUS;
|
||||
net_buf_add_be16(buf, can_get_lladdr_src(frame));
|
||||
net_buf_pull(buf, sizeof(u16_t));
|
||||
net_buf_pull(buf, sizeof(uint16_t));
|
||||
}
|
||||
|
||||
static int net_can_send(struct device *dev, const struct zcan_frame *frame,
|
||||
|
|
@ -149,7 +149,7 @@ static inline int attach_mcast_filter(struct net_can_context *ctx,
|
|||
.ext_id_mask = CAN_NET_IF_ADDR_MCAST_MASK |
|
||||
CAN_NET_IF_ADDR_DEST_MASK
|
||||
};
|
||||
const u16_t group =
|
||||
const uint16_t group =
|
||||
sys_be16_to_cpu(UNALIGNED_GET((&addr->s6_addr16[7])));
|
||||
int filter_id;
|
||||
|
||||
|
|
@ -243,8 +243,8 @@ static inline int can_attach_unicast_filter(struct net_can_context *ctx)
|
|||
.rtr_mask = 1,
|
||||
.ext_id_mask = CAN_NET_IF_ADDR_DEST_MASK
|
||||
};
|
||||
const u8_t *link_addr = net_if_get_link_addr(ctx->iface)->addr;
|
||||
const u16_t dest = sys_be16_to_cpu(UNALIGNED_GET((u16_t *) link_addr));
|
||||
const uint8_t *link_addr = net_if_get_link_addr(ctx->iface)->addr;
|
||||
const uint16_t dest = sys_be16_to_cpu(UNALIGNED_GET((uint16_t *) link_addr));
|
||||
int filter_id;
|
||||
|
||||
filter.ext_id = (dest << CAN_NET_IF_ADDR_DEST_POS);
|
||||
|
|
|
|||
|
|
@ -81,7 +81,7 @@ static inline int read_frame_options(const struct shell *shell, int pos,
|
|||
}
|
||||
|
||||
static inline int read_bitrate(const struct shell *shell, int pos, char **argv,
|
||||
u32_t *bitrate)
|
||||
uint32_t *bitrate)
|
||||
{
|
||||
char *end_ptr;
|
||||
long val;
|
||||
|
|
@ -92,13 +92,13 @@ static inline int read_bitrate(const struct shell *shell, int pos, char **argv,
|
|||
return -EINVAL;
|
||||
}
|
||||
|
||||
*bitrate = (u32_t)val;
|
||||
*bitrate = (uint32_t)val;
|
||||
|
||||
return ++pos;
|
||||
}
|
||||
|
||||
static inline int read_id(const struct shell *shell, int pos, char **argv,
|
||||
bool ext, u32_t *id)
|
||||
bool ext, uint32_t *id)
|
||||
{
|
||||
char *end_ptr;
|
||||
long val;
|
||||
|
|
@ -118,13 +118,13 @@ static inline int read_id(const struct shell *shell, int pos, char **argv,
|
|||
return -EINVAL;
|
||||
}
|
||||
|
||||
*id = (u32_t)val;
|
||||
*id = (uint32_t)val;
|
||||
|
||||
return ++pos;
|
||||
}
|
||||
|
||||
static inline int read_mask(const struct shell *shell, int pos, char **argv,
|
||||
bool ext, u32_t *mask)
|
||||
bool ext, uint32_t *mask)
|
||||
{
|
||||
char *end_ptr;
|
||||
long val;
|
||||
|
|
@ -144,16 +144,16 @@ static inline int read_mask(const struct shell *shell, int pos, char **argv,
|
|||
return -EINVAL;
|
||||
}
|
||||
|
||||
*mask = (u32_t)val;
|
||||
*mask = (uint32_t)val;
|
||||
|
||||
return ++pos;
|
||||
}
|
||||
|
||||
static inline int read_data(const struct shell *shell, int pos, char **argv,
|
||||
size_t argc, u8_t *data, u8_t *dlc)
|
||||
size_t argc, uint8_t *data, uint8_t *dlc)
|
||||
{
|
||||
int i;
|
||||
u8_t *data_ptr = data;
|
||||
uint8_t *data_ptr = data;
|
||||
|
||||
if (argc - pos > CAN_MAX_DLC) {
|
||||
shell_error(shell, "Too many databytes. Max is %d",
|
||||
|
|
@ -213,7 +213,7 @@ static int cmd_config(const struct shell *shell, size_t argc, char **argv)
|
|||
int pos = 1;
|
||||
bool silent = false, loopback = false;
|
||||
enum can_mode mode;
|
||||
u32_t bitrate;
|
||||
uint32_t bitrate;
|
||||
int ret;
|
||||
|
||||
can_dev = device_get_binding(argv[pos]);
|
||||
|
|
@ -262,7 +262,7 @@ static int cmd_send(const struct shell *shell, size_t argc, char **argv)
|
|||
bool rtr = false, ext = false;
|
||||
struct zcan_frame frame;
|
||||
int ret;
|
||||
u32_t id;
|
||||
uint32_t id;
|
||||
|
||||
can_dev = device_get_binding(argv[pos]);
|
||||
if (!can_dev) {
|
||||
|
|
@ -313,7 +313,7 @@ static int cmd_attach(const struct shell *shell, size_t argc, char **argv)
|
|||
bool rtr = false, ext = false, rtr_mask = false;
|
||||
struct zcan_filter filter;
|
||||
int ret;
|
||||
u32_t id, mask;
|
||||
uint32_t id, mask;
|
||||
|
||||
can_dev = device_get_binding(argv[pos]);
|
||||
if (!can_dev) {
|
||||
|
|
|
|||
|
|
@ -30,8 +30,8 @@ LOG_MODULE_DECLARE(can_driver, CONFIG_CAN_LOG_LEVEL);
|
|||
* filter_in_bank[enum can_filter_type] = number of filters in bank for this type
|
||||
* reg_demand[enum can_filter_type] = how many registers are used for this type
|
||||
*/
|
||||
static const u8_t filter_in_bank[] = {2, 4, 1, 2};
|
||||
static const u8_t reg_demand[] = {2, 1, 4, 2};
|
||||
static const uint8_t filter_in_bank[] = {2, 4, 1, 2};
|
||||
static const uint8_t reg_demand[] = {2, 1, 4, 2};
|
||||
|
||||
static void can_stm32_signal_tx_complete(struct can_mailbox *mb)
|
||||
{
|
||||
|
|
@ -126,7 +126,7 @@ static inline void can_stm32_bus_state_change_isr(CAN_TypeDef *can,
|
|||
static inline
|
||||
void can_stm32_tx_isr_handler(CAN_TypeDef *can, struct can_stm32_data *data)
|
||||
{
|
||||
u32_t bus_off;
|
||||
uint32_t bus_off;
|
||||
|
||||
bus_off = can->ESR & CAN_ESR_BOFF;
|
||||
|
||||
|
|
@ -250,7 +250,7 @@ static void can_stm32_state_change_isr(void *arg)
|
|||
|
||||
static int can_enter_init_mode(CAN_TypeDef *can)
|
||||
{
|
||||
u32_t start_time;
|
||||
uint32_t start_time;
|
||||
|
||||
can->MCR |= CAN_MCR_INRQ;
|
||||
start_time = k_cycle_get_32();
|
||||
|
|
@ -267,7 +267,7 @@ static int can_enter_init_mode(CAN_TypeDef *can)
|
|||
|
||||
static int can_leave_init_mode(CAN_TypeDef *can)
|
||||
{
|
||||
u32_t start_time;
|
||||
uint32_t start_time;
|
||||
|
||||
can->MCR &= ~CAN_MCR_INRQ;
|
||||
start_time = k_cycle_get_32();
|
||||
|
|
@ -283,7 +283,7 @@ static int can_leave_init_mode(CAN_TypeDef *can)
|
|||
|
||||
static int can_leave_sleep_mode(CAN_TypeDef *can)
|
||||
{
|
||||
u32_t start_time;
|
||||
uint32_t start_time;
|
||||
|
||||
can->MCR &= ~CAN_MCR_SLEEP;
|
||||
start_time = k_cycle_get_32();
|
||||
|
|
@ -298,19 +298,19 @@ static int can_leave_sleep_mode(CAN_TypeDef *can)
|
|||
}
|
||||
|
||||
int can_stm32_runtime_configure(struct device *dev, enum can_mode mode,
|
||||
u32_t bitrate)
|
||||
uint32_t bitrate)
|
||||
{
|
||||
CAN_HandleTypeDef hcan;
|
||||
const struct can_stm32_config *cfg = DEV_CFG(dev);
|
||||
CAN_TypeDef *can = cfg->can;
|
||||
struct can_stm32_data *data = DEV_DATA(dev);
|
||||
struct device *clock;
|
||||
u32_t clock_rate;
|
||||
u32_t prescaler;
|
||||
u32_t reg_mode;
|
||||
u32_t ts1;
|
||||
u32_t ts2;
|
||||
u32_t sjw;
|
||||
uint32_t clock_rate;
|
||||
uint32_t prescaler;
|
||||
uint32_t reg_mode;
|
||||
uint32_t ts1;
|
||||
uint32_t ts2;
|
||||
uint32_t sjw;
|
||||
int ret;
|
||||
|
||||
clock = device_get_binding(STM32_CLOCK_CONTROL_NAME);
|
||||
|
|
@ -506,7 +506,7 @@ int can_stm32_recover(struct device *dev, k_timeout_t timeout)
|
|||
struct can_stm32_data *data = DEV_DATA(dev);
|
||||
CAN_TypeDef *can = cfg->can;
|
||||
int ret = CAN_TIMEOUT;
|
||||
s64_t start_time;
|
||||
int64_t start_time;
|
||||
|
||||
if (!(can->ESR & CAN_ESR_BOFF)) {
|
||||
return 0;
|
||||
|
|
@ -548,7 +548,7 @@ int can_stm32_send(struct device *dev, const struct zcan_frame *msg,
|
|||
const struct can_stm32_config *cfg = DEV_CFG(dev);
|
||||
struct can_stm32_data *data = DEV_DATA(dev);
|
||||
CAN_TypeDef *can = cfg->can;
|
||||
u32_t transmit_status_register = can->TSR;
|
||||
uint32_t transmit_status_register = can->TSR;
|
||||
CAN_TxMailBox_TypeDef *mailbox = NULL;
|
||||
struct can_mailbox *mb = NULL;
|
||||
|
||||
|
|
@ -690,21 +690,21 @@ static int can_stm32_shift_arr(void **arr, int start, int count)
|
|||
return 0;
|
||||
}
|
||||
|
||||
enum can_filter_type can_stm32_get_filter_type(int bank_nr, u32_t mode_reg,
|
||||
u32_t scale_reg)
|
||||
enum can_filter_type can_stm32_get_filter_type(int bank_nr, uint32_t mode_reg,
|
||||
uint32_t scale_reg)
|
||||
{
|
||||
u32_t mode_masked = (mode_reg >> bank_nr) & 0x01;
|
||||
u32_t scale_masked = (scale_reg >> bank_nr) & 0x01;
|
||||
uint32_t mode_masked = (mode_reg >> bank_nr) & 0x01;
|
||||
uint32_t scale_masked = (scale_reg >> bank_nr) & 0x01;
|
||||
enum can_filter_type type = (scale_masked << 1) | mode_masked;
|
||||
|
||||
return type;
|
||||
}
|
||||
|
||||
static int can_calc_filter_index(int filter_nr, u32_t mode_reg, u32_t scale_reg)
|
||||
static int can_calc_filter_index(int filter_nr, uint32_t mode_reg, uint32_t scale_reg)
|
||||
{
|
||||
int filter_bank = filter_nr / 4;
|
||||
int cnt = 0;
|
||||
u32_t mode_masked, scale_masked;
|
||||
uint32_t mode_masked, scale_masked;
|
||||
enum can_filter_type filter_type;
|
||||
/*count filters in the banks before */
|
||||
for (int i = 0; i < filter_bank; i++) {
|
||||
|
|
@ -723,7 +723,7 @@ static int can_calc_filter_index(int filter_nr, u32_t mode_reg, u32_t scale_reg)
|
|||
static void can_stm32_set_filter_bank(int filter_nr,
|
||||
CAN_FilterRegister_TypeDef *filter_reg,
|
||||
enum can_filter_type filter_type,
|
||||
u32_t id, u32_t mask)
|
||||
uint32_t id, uint32_t mask)
|
||||
{
|
||||
switch (filter_type) {
|
||||
case CAN_FILTER_STANDARD:
|
||||
|
|
@ -775,11 +775,11 @@ static void can_stm32_set_filter_bank(int filter_nr,
|
|||
}
|
||||
|
||||
static inline void can_stm32_set_mode_scale(enum can_filter_type filter_type,
|
||||
u32_t *mode_reg, u32_t *scale_reg,
|
||||
uint32_t *mode_reg, uint32_t *scale_reg,
|
||||
int bank_nr)
|
||||
{
|
||||
u32_t mode_reg_bit = (filter_type & 0x01) << bank_nr;
|
||||
u32_t scale_reg_bit = (filter_type >> 1) << bank_nr;
|
||||
uint32_t mode_reg_bit = (filter_type & 0x01) << bank_nr;
|
||||
uint32_t scale_reg_bit = (filter_type >> 1) << bank_nr;
|
||||
|
||||
*mode_reg &= ~(1 << bank_nr);
|
||||
*mode_reg |= mode_reg_bit;
|
||||
|
|
@ -788,21 +788,21 @@ static inline void can_stm32_set_mode_scale(enum can_filter_type filter_type,
|
|||
*scale_reg |= scale_reg_bit;
|
||||
}
|
||||
|
||||
static inline u32_t can_generate_std_mask(const struct zcan_filter *filter)
|
||||
static inline uint32_t can_generate_std_mask(const struct zcan_filter *filter)
|
||||
{
|
||||
return (filter->std_id_mask << CAN_FIRX_STD_ID_POS) |
|
||||
(filter->rtr_mask << CAN_FIRX_STD_RTR_POS) |
|
||||
(1U << CAN_FIRX_STD_IDE_POS);
|
||||
}
|
||||
|
||||
static inline u32_t can_generate_ext_mask(const struct zcan_filter *filter)
|
||||
static inline uint32_t can_generate_ext_mask(const struct zcan_filter *filter)
|
||||
{
|
||||
return (filter->ext_id_mask << CAN_FIRX_EXT_EXT_ID_POS) |
|
||||
(filter->rtr_mask << CAN_FIRX_EXT_RTR_POS) |
|
||||
(1U << CAN_FIRX_EXT_IDE_POS);
|
||||
}
|
||||
|
||||
static inline u32_t can_generate_std_id(const struct zcan_filter *filter)
|
||||
static inline uint32_t can_generate_std_id(const struct zcan_filter *filter)
|
||||
{
|
||||
|
||||
return (filter->std_id << CAN_FIRX_STD_ID_POS) |
|
||||
|
|
@ -810,7 +810,7 @@ static inline u32_t can_generate_std_id(const struct zcan_filter *filter)
|
|||
|
||||
}
|
||||
|
||||
static inline u32_t can_generate_ext_id(const struct zcan_filter *filter)
|
||||
static inline uint32_t can_generate_ext_id(const struct zcan_filter *filter)
|
||||
{
|
||||
return (filter->ext_id << CAN_FIRX_EXT_EXT_ID_POS) |
|
||||
(filter->rtr << CAN_FIRX_EXT_RTR_POS) |
|
||||
|
|
@ -822,12 +822,12 @@ static inline int can_stm32_set_filter(const struct zcan_filter *filter,
|
|||
CAN_TypeDef *can,
|
||||
int *filter_index)
|
||||
{
|
||||
u32_t mask = 0U;
|
||||
u32_t id = 0U;
|
||||
uint32_t mask = 0U;
|
||||
uint32_t id = 0U;
|
||||
int filter_nr = 0;
|
||||
int filter_index_new = CAN_NO_FREE_FILTER;
|
||||
int bank_nr;
|
||||
u32_t bank_bit;
|
||||
uint32_t bank_bit;
|
||||
int register_demand;
|
||||
enum can_filter_type filter_type;
|
||||
enum can_filter_type bank_mode;
|
||||
|
|
@ -864,8 +864,8 @@ static inline int can_stm32_set_filter(const struct zcan_filter *filter,
|
|||
filter_type);
|
||||
|
||||
do {
|
||||
u64_t usage_shifted = (device_data->filter_usage >> filter_nr);
|
||||
u64_t usage_demand_mask = (1ULL << register_demand) - 1;
|
||||
uint64_t usage_shifted = (device_data->filter_usage >> filter_nr);
|
||||
uint64_t usage_demand_mask = (1ULL << register_demand) - 1;
|
||||
bool bank_is_empty;
|
||||
|
||||
bank_nr = filter_nr / 4;
|
||||
|
|
@ -900,8 +900,8 @@ static inline int can_stm32_set_filter(const struct zcan_filter *filter,
|
|||
if (filter_type != bank_mode) {
|
||||
int shift_width, start_index;
|
||||
int res;
|
||||
u32_t mode_reg = can->FM1R;
|
||||
u32_t scale_reg = can->FS1R;
|
||||
uint32_t mode_reg = can->FM1R;
|
||||
uint32_t scale_reg = can->FS1R;
|
||||
|
||||
can_stm32_set_mode_scale(filter_type, &mode_reg, &scale_reg,
|
||||
bank_nr);
|
||||
|
|
@ -990,11 +990,11 @@ void can_stm32_detach(struct device *dev, int filter_nr)
|
|||
CAN_TypeDef *can = cfg->master_can;
|
||||
int bank_nr;
|
||||
int filter_index;
|
||||
u32_t bank_bit;
|
||||
u32_t mode_reg;
|
||||
u32_t scale_reg;
|
||||
uint32_t bank_bit;
|
||||
uint32_t mode_reg;
|
||||
uint32_t scale_reg;
|
||||
enum can_filter_type type;
|
||||
u32_t reset_mask;
|
||||
uint32_t reset_mask;
|
||||
|
||||
__ASSERT_NO_MSG(filter_nr >= 0 && filter_nr < CAN_MAX_NUMBER_OF_FILTERS);
|
||||
|
||||
|
|
|
|||
|
|
@ -43,7 +43,7 @@ struct can_mailbox {
|
|||
can_tx_callback_t tx_callback;
|
||||
void *callback_arg;
|
||||
struct k_sem tx_int_sem;
|
||||
u32_t error_flags;
|
||||
uint32_t error_flags;
|
||||
};
|
||||
|
||||
|
||||
|
|
@ -61,7 +61,7 @@ struct can_stm32_data {
|
|||
struct can_mailbox mb0;
|
||||
struct can_mailbox mb1;
|
||||
struct can_mailbox mb2;
|
||||
u64_t filter_usage;
|
||||
uint64_t filter_usage;
|
||||
can_rx_callback_t rx_cb[CONFIG_CAN_MAX_FILTER];
|
||||
void *cb_arg[CONFIG_CAN_MAX_FILTER];
|
||||
can_state_change_isr_t state_change_isr;
|
||||
|
|
@ -70,10 +70,10 @@ struct can_stm32_data {
|
|||
struct can_stm32_config {
|
||||
CAN_TypeDef *can; /*!< CAN Registers*/
|
||||
CAN_TypeDef *master_can; /*!< CAN Registers for shared filter */
|
||||
u32_t bus_speed;
|
||||
u8_t sjw;
|
||||
u8_t prop_ts1;
|
||||
u8_t ts2;
|
||||
uint32_t bus_speed;
|
||||
uint8_t sjw;
|
||||
uint8_t prop_ts1;
|
||||
uint8_t ts2;
|
||||
struct stm32_pclken pclken;
|
||||
void (*config_irq)(CAN_TypeDef *can);
|
||||
};
|
||||
|
|
|
|||
|
|
@ -43,7 +43,7 @@ static inline void socket_can_iface_init(struct net_if *iface)
|
|||
LOG_DBG("Init CAN interface %p dev %p", iface, dev);
|
||||
}
|
||||
|
||||
static inline void tx_irq_callback(u32_t error_flags, void *arg)
|
||||
static inline void tx_irq_callback(uint32_t error_flags, void *arg)
|
||||
{
|
||||
char *caller_str = (char *)arg;
|
||||
if (error_flags) {
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue