soc: rt11xx: Enable USDHC SD host controller on RT1170
Enable SD host controller driver for RT1170, so the EVK can use the new SD subsystem. Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
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aef290bb4d
commit
a18338bf45
6 changed files with 20 additions and 21 deletions
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@ -19,12 +19,9 @@ if DISK_DRIVERS
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config DISK_DRIVER_SDMMC
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default y
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config SDMMC_USDHC_DAT3_PWR_TOGGLE
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config IMX_USDHC_DAT3_PWR_TOGGLE
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default y
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config SDMMC_USDHC_DAT3_PWR_DELAY
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default 10
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endif # DISK_DRIVERS
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if FLASH
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@ -106,9 +106,13 @@
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&usdhc1 {
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status = "okay";
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no-1-8-v;
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detect-dat3;
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pwr-gpios = <&gpio10 2 GPIO_ACTIVE_LOW>;
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mmc {
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compatible = "zephyr,sdmmc-disk";
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status = "okay";
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label = "SDMMC_0";
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};
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};
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&edma0 {
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@ -21,14 +21,4 @@ endchoice
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config DISK_DRIVER_SDMMC
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default y if DISK_DRIVERS
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if DISK_DRIVER_SDMMC
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config SDMMC_USDHC_DAT3_PWR_TOGGLE
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default y
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config SDMMC_USDHC_DAT3_PWR_DELAY
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default 10
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endif # DISK_DRIVER_SDMMC
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endif # BOARD_TEENSY40 || BOARD_TEENSY41
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@ -55,7 +55,7 @@ static int mcux_ccm_get_subsys_rate(const struct device *dev,
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break;
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#endif
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(usdhc1), okay) && CONFIG_DISK_DRIVER_SDMMC
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(usdhc1), okay) && CONFIG_IMX_USDHC
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case IMX_CCM_USDHC1_CLK:
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clock_root = kCLOCK_Root_Usdhc1 + instance;
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break;
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@ -775,21 +775,29 @@
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};
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usdhc1: usdhc@40418000 {
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compatible = "nxp,imx-usdhc";
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compatible = "nxp,imx-sdhc";
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reg = <0x40418000 0x4000>;
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status = "disabled";
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interrupts = <133 0>;
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clocks = <&ccm IMX_CCM_USDHC1_CLK 0 0>;
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label = "USDHC_1";
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label = "SDHC_0";
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max-current-330 = <1020>;
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max-current-180 = <1020>;
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max-bus-freq = <208000000>;
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min-bus-freq = <400000>;
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};
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usdhc2: usdhc@4041c000 {
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compatible = "nxp,imx-usdhc";
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compatible = "nxp,imx-sdhc";
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reg = <0x4041c000 0x4000>;
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status = "disabled";
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interrupts = <134 0>;
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clocks = <&ccm IMX_CCM_USDHC2_CLK 0 0>;
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label = "USDHC_2";
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label = "SDHC_1";
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max-current-330 = <1020>;
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max-current-180 = <1020>;
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max-bus-freq = <208000000>;
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min-bus-freq = <400000>;
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};
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csi: csi@40800000 {
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@ -428,7 +428,7 @@ static ALWAYS_INLINE void clock_init(void)
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USB_EhciPhyInit(kUSB_ControllerEhci1, CPU_XTAL_CLK_HZ, &usbPhyConfig);
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#endif
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(usdhc1), okay) && CONFIG_DISK_DRIVER_SDMMC
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(usdhc1), okay) && CONFIG_IMX_USDHC
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/* Configure USDHC1 using SysPll2Pfd2*/
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rootCfg.mux = kCLOCK_USDHC1_ClockRoot_MuxSysPll2Pfd2;
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rootCfg.div = 2;
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