michaelh/zephyr
1
0
Fork 0
Code Releases Activity

drivers: video: mipi_csi2rx: Set clocks according to pixel rate

Browse source 
Instead of fixing csi2rx clock frequencies, set them according to the
pixel rate got from the camera sensor.

Signed-off-by: Trung Hieu Le <trunghieu.le@nxp.com>
Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
This commit is contained in:
Trung Hieu Le 2024-07-24 21:38:08 +02:00 • committed by Henrik Brix Andersen
commit a182394725
7 changed files with 184 additions and 96 deletions
Download patch file Download diff file Expand all files Collapse all files

46
soc/nxp/imxrt/imxrt11xx/soc.c
View file

@ -474,17 +474,6 @@ static ALWAYS_INLINE void clock_init(void)
CLOCK_EnableClock(kCLOCK_Video_Mux);
VIDEO_MUX->VID_MUX_CTRL.SET = VIDEO_MUX_VID_MUX_CTRL_CSI_SEL_MASK;
/* Configure MIPI CSI-2 Rx clocks */
rootCfg.div = 8;
rootCfg.mux = kCLOCK_CSI2_ClockRoot_MuxSysPll3Out;
CLOCK_SetRootClock(kCLOCK_Root_Csi2, &rootCfg);
rootCfg.mux = kCLOCK_CSI2_ESC_ClockRoot_MuxSysPll3Out;
CLOCK_SetRootClock(kCLOCK_Root_Csi2_Esc, &rootCfg);
rootCfg.mux = kCLOCK_CSI2_UI_ClockRoot_MuxSysPll3Out;
CLOCK_SetRootClock(kCLOCK_Root_Csi2_Ui, &rootCfg);
/* Enable power domain for MIPI CSI-2 */
PGMC_BPC4->BPC_POWER_CTRL |= (PGMC_BPC_BPC_POWER_CTRL_PSW_ON_SOFT_MASK |
PGMC_BPC_BPC_POWER_CTRL_ISO_OFF_SOFT_MASK);
@ -682,6 +671,41 @@ void imxrt_post_init_display_interface(void)
#endif
#if CONFIG_VIDEO_MCUX_MIPI_CSI2RX
int mipi_csi2rx_clock_set_freq(clock_root_t clock_root, uint32_t rate)
{
clock_root_config_t rootCfg = {0};
uint32_t freq;
clock_name_t clk_source;
switch (clock_root) {
case kCLOCK_Root_Csi2:
rootCfg.mux = kCLOCK_CSI2_ClockRoot_MuxSysPll3Out;
break;
case kCLOCK_Root_Csi2_Esc:
rootCfg.mux = kCLOCK_CSI2_ESC_ClockRoot_MuxSysPll3Out;
break;
case kCLOCK_Root_Csi2_Ui:
rootCfg.mux = kCLOCK_CSI2_UI_ClockRoot_MuxSysPll3Out;
break;
default:
return -EINVAL;
}
clk_source = CLOCK_GetRootClockSource(clock_root, rootCfg.mux);
freq = CLOCK_GetFreq(clk_source);
if (rate > freq) {
LOG_ERR("Requested rate is higher than the maximum clock frequency");
return -EINVAL;
}
rootCfg.div = (uint32_t)freq / rate;
CLOCK_SetRootClock(clock_root, &rootCfg);
return 0;
}
#endif
/**
*
* @brief Perform basic hardware initialization

4
soc/nxp/imxrt/imxrt11xx/soc.h
View file

@ -32,6 +32,10 @@ void imxrt_pre_init_display_interface(void);
void imxrt_post_init_display_interface(void);
#endif
#if CONFIG_VIDEO_MCUX_MIPI_CSI2RX
int mipi_csi2rx_clock_set_freq(clock_root_t clock_root, uint32_t rate);
#endif
void flexspi_clock_set_div(uint32_t value);
uint32_t flexspi_clock_get_freq(void);