From a1654585bf879126ba477fbb9eafa23344eb732f Mon Sep 17 00:00:00 2001
From: Bindu S <bindu.s@intel.com>
Date: Tue, 8 Aug 2023 10:52:23 +0530
Subject: [PATCH] dts: x86: intel: Added dts changes to support dma for RPL

Added dts changes to support lpss dma for I2C driver
for RPL platform.

Signed-off-by: Bindu S <bindu.s@intel.com>
---
 dts/x86/intel/raptor_lake.dtsi | 62 ++++++++++++++++++++++++++++++++--
 1 file changed, 60 insertions(+), 2 deletions(-)

diff --git a/dts/x86/intel/raptor_lake.dtsi b/dts/x86/intel/raptor_lake.dtsi
index 1e412336ae8..91a6d933260 100644
--- a/dts/x86/intel/raptor_lake.dtsi
+++ b/dts/x86/intel/raptor_lake.dtsi
@@ -75,6 +75,13 @@
 			status = "okay";
 		};
 
+		i2c0_dma: i2c0_dma {
+			compatible = "intel,lpss";
+			dma-parent = <&i2c0>;
+			#dma-cells = <1>;
+			status = "okay";
+		};
+
 		i2c1: i2c1 {
 			compatible = "snps,designware-i2c";
 			clock-frequency = <I2C_BITRATE_STANDARD>;
@@ -85,7 +92,14 @@
 			interrupts = <PCIE_IRQ_DETECT IRQ_TYPE_LOWEST_LEVEL_LOW 3>;
 			interrupt-parent = <&intc>;
 
-			status = "okay";
+			status = "disabled";
+		};
+
+		i2c1_dma: i2c1_dma {
+			compatible = "intel,lpss";
+			dma-parent = <&i2c1>;
+			#dma-cells = <1>;
+			status = "disabled";
 		};
 
 		i2c2: i2c2 {
@@ -93,12 +107,21 @@
 			clock-frequency = <I2C_BITRATE_STANDARD>;
 			#address-cells = <1>;
 			#size-cells = <0>;
+			#address-cells = <1>;
+			#size-cells = <0>;
 			vendor-id = <0x8086>;
 			device-id = <0x7ace>;
 			interrupts = <PCIE_IRQ_DETECT IRQ_TYPE_LOWEST_LEVEL_LOW 3>;
 			interrupt-parent = <&intc>;
 
-			status = "okay";
+			status = "disabled";
+		};
+
+		i2c2_dma: i2c2_dma {
+			compatible = "intel,lpss";
+			dma-parent = <&i2c2>;
+			#dma-cells = <1>;
+			status = "disabled";
 		};
 
 		i2c3: i2c3 {
@@ -114,6 +137,13 @@
 			status = "disabled";
 		};
 
+		i2c3_dma: i2c3_dma {
+			compatible = "intel,lpss";
+			dma-parent = <&i2c3>;
+			#dma-cells = <1>;
+			status = "disabled";
+		};
+
 		i2c4: i2c4 {
 			compatible = "snps,designware-i2c";
 			clock-frequency = <I2C_BITRATE_STANDARD>;
@@ -127,6 +157,13 @@
 			status = "disabled";
 		};
 
+		i2c4_dma: i2c4_dma {
+			compatible = "intel,lpss";
+			dma-parent = <&i2c4>;
+			#dma-cells = <1>;
+			status = "disabled";
+		};
+
 		i2c5: i2c5 {
 			compatible = "snps,designware-i2c";
 			clock-frequency = <I2C_BITRATE_STANDARD>;
@@ -140,6 +177,13 @@
 			status = "disabled";
 		};
 
+		i2c5_dma: i2c5_dma {
+			compatible = "intel,lpss";
+			dma-parent = <&i2c5>;
+			#dma-cells = <1>;
+			status = "disabled";
+		};
+
 		i2c6: i2c6 {
 			compatible = "snps,designware-i2c";
 			clock-frequency = <I2C_BITRATE_STANDARD>;
@@ -153,6 +197,13 @@
 			status = "disabled";
 		};
 
+		i2c6_dma: i2c6_dma {
+			compatible = "intel,lpss";
+			dma-parent = <&i2c6>;
+			#dma-cells = <1>;
+			status = "disabled";
+		};
+
 		i2c7: i2c7 {
 			compatible = "snps,designware-i2c";
 			clock-frequency = <I2C_BITRATE_STANDARD>;
@@ -166,6 +217,13 @@
 			status = "disabled";
 		};
 
+		i2c7_dma: i2c7_dma {
+			compatible = "intel,lpss";
+			dma-parent = <&i2c7>;
+			#dma-cells = <1>;
+			status = "disabled";
+		};
+
 		spi0: spi0 {
 			compatible = "intel,penwell-spi";
 			vendor-id = <0x8086>;