Bluetooth: controller: split: Use correct secondary PHY, AA and CRC

Implement use of correct secondary PHY for transmission,
access address and CRC setup.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
This commit is contained in:
Vinayak Kariappa Chettimada 2020-02-07 18:12:16 +05:30 committed by Carles Cufí
commit a126850c15
6 changed files with 35 additions and 14 deletions

View file

@ -15,6 +15,7 @@ struct lll_adv_pdu {
struct lll_adv_sync {
struct lll_hdr hdr;
struct lll_adv *adv;
uint8_t access_addr[4];
uint8_t crc_init[3];
@ -45,6 +46,7 @@ struct lll_adv {
#if defined(CONFIG_BT_CTLR_ADV_EXT)
uint8_t phy_p:3;
uint8_t phy_s:3;
#endif /* CONFIG_BT_CTLR_ADV_EXT */
#if defined(CONFIG_BT_HCI_MESH_EXT)

View file

@ -92,6 +92,7 @@ static int prepare_cb(struct lll_prepare_param *prepare_param)
uint8_t data_chan_use;
uint32_t remainder;
uint16_t lazy;
uint8_t phy_s;
uint8_t upd;
DEBUG_RADIO_START_A(1);
@ -126,6 +127,11 @@ static int prepare_cb(struct lll_prepare_param *prepare_param)
radio_tx_power_set(RADIO_TXP_DEFAULT);
#endif
phy_s = lll->adv->phy_s;
/* TODO: if coded we use S8? */
radio_phy_set(phy_s, 1);
radio_pkt_configure(8, PDU_AC_PAYLOAD_SIZE_MAX, (phy_s << 1));
radio_aa_set(lll->access_addr);
radio_crc_configure(((0x5bUL) | ((0x06UL) << 8) | ((0x00UL) << 16)),
(((uint32_t)lll->crc_init[2] << 16) |

View file

@ -320,7 +320,7 @@ uint8_t ll_adv_params_set(uint16_t interval, uint8_t adv_type,
aux->offs_units = 0; /* FIXME: implementation defined */
aux->phy = find_lsb_set(phy_s) - 1;
}
adv->phy_s = phy_s;
adv->lll.phy_s = phy_s;
/* ADI */
if (h->adi) {
@ -800,7 +800,7 @@ uint8_t ll_adv_enable(uint8_t enable)
/* For now we adv on all channels enabled in channel map */
uint8_t ch_map = lll->chan_map;
const uint8_t adv_chn_cnt = util_ones_count_get(&ch_map, sizeof(ch_map));
uint32_t slot_us = EVENT_OVERHEAD_START_US + EVENT_OVERHEAD_END_US;
uint32_t slot_us = EVENT_OVERHEAD_START_US + EVENT_OVERHEAD_END_US;
if (adv_chn_cnt == 0) {
/* ADV needs at least one channel */
@ -810,6 +810,7 @@ uint8_t ll_adv_enable(uint8_t enable)
#if defined(CONFIG_BT_CTLR_ADV_EXT)
if (pdu_adv->type == PDU_ADV_TYPE_EXT_IND) {
/* TBD */
slot_us += 1500;
} else
#endif
{

View file

@ -252,7 +252,7 @@ uint8_t ll_adv_aux_ad_data_set(uint8_t handle, uint8_t op, uint8_t frag_pref, ui
aux->chan_idx = 0; /* FIXME: implementation defined */
aux->ca = 0; /* FIXME: implementation defined */
aux->offs_units = 0; /* FIXME: implementation defined */
aux->phy = find_lsb_set(adv->phy_s) - 1;
aux->phy = find_lsb_set(adv->lll.phy_s) - 1;
}
/* TODO: reduce duplicate code if below remains similar to primary PDU
@ -268,7 +268,7 @@ uint8_t ll_adv_aux_ad_data_set(uint8_t handle, uint8_t op, uint8_t frag_pref, ui
aux->chan_idx = 0; /* FIXME: implementation defined */
aux->ca = 0; /* FIXME: implementation defined */
aux->offs_units = 0; /* FIXME: implementation defined */
aux->phy = find_lsb_set(adv->phy_s) - 1;
aux->phy = find_lsb_set(adv->lll.phy_s) - 1;
}
/* ADI */

View file

@ -26,6 +26,7 @@
#include "ull_adv_types.h"
#include "ull_internal.h"
#include "ull_chan_internal.h"
#include "ull_adv_internal.h"
#define BT_DBG_ENABLED IS_ENABLED(CONFIG_BT_DEBUG_HCI_DRIVER)
@ -68,6 +69,18 @@ uint8_t ll_adv_sync_param_set(uint8_t handle, uint16_t interval, uint16_t flags)
ull_hdr_init(&sync->ull);
lll_hdr_init(lll, sync);
util_aa_to_le32(lll->access_addr);
util_rand(lll->crc_init, sizeof(lll->crc_init));
lll->latency_prepare = 0;
lll->latency_event = 0;
lll->event_counter = 0;
lll->data_chan_count = ull_chan_map_get(lll->data_chan_map);
lll->data_chan_id = 0;
lll->adv = &adv->lll;
} else {
sync = (void *)HDR_LLL2EVT(lll);
}
@ -171,26 +184,25 @@ uint16_t ull_adv_sync_lll_handle_get(struct lll_adv_sync *lll)
uint32_t ull_adv_sync_start(struct ll_adv_sync_set *sync, uint32_t ticks_anchor,
uint32_t volatile *ret_cb)
{
uint32_t slot_us, ticks_slot_offset, ticks_slot_overhead;
uint32_t slot_us = EVENT_OVERHEAD_START_US + EVENT_OVERHEAD_END_US;
uint32_t ticks_slot_overhead;
uint8_t sync_handle;
uint32_t ret;
/* TODO: Calc AUX_SYNC_IND slot_us */
slot_us = 0;
slot_us = 1000;
/* TODO: active_to_start feature port */
sync->evt.ticks_active_to_start = 0;
sync->evt.ticks_xtal_to_start =
HAL_TICKER_US_TO_TICKS(EVENT_OVERHEAD_XTAL_US);
HAL_TICKER_US_TO_TICKS(EVENT_OVERHEAD_XTAL_US);
sync->evt.ticks_preempt_to_start =
HAL_TICKER_US_TO_TICKS(EVENT_OVERHEAD_PREEMPT_MIN_US);
HAL_TICKER_US_TO_TICKS(EVENT_OVERHEAD_PREEMPT_MIN_US);
sync->evt.ticks_slot = HAL_TICKER_US_TO_TICKS(slot_us);
ticks_slot_offset = MAX(sync->evt.ticks_active_to_start,
sync->evt.ticks_xtal_to_start);
if (IS_ENABLED(CONFIG_BT_CTLR_LOW_LAT)) {
ticks_slot_overhead = ticks_slot_offset;
ticks_slot_overhead = MAX(sync->evt.ticks_active_to_start,
sync->evt.ticks_xtal_to_start);
} else {
ticks_slot_overhead = 0;
}
@ -201,7 +213,8 @@ uint32_t ull_adv_sync_start(struct ll_adv_sync_set *sync, uint32_t ticks_anchor,
ret = ticker_start(TICKER_INSTANCE_ID_CTLR, TICKER_USER_ID_THREAD,
(TICKER_ID_ADV_SYNC_BASE + sync_handle),
ticks_anchor, 0,
(sync->evt.ticks_slot + ticks_slot_overhead),
HAL_TICKER_US_TO_TICKS((uint64_t)sync->interval *
1250),
TICKER_NULL_REMAINDER, TICKER_NULL_LAZY,
(sync->evt.ticks_slot + ticks_slot_overhead),
ticker_cb, sync,

View file

@ -17,7 +17,6 @@ struct ll_adv_set {
#if defined(CONFIG_BT_CTLR_ADV_EXT)
uint32_t interval;
uint8_t sid:4;
uint8_t phy_s:3;
uint8_t is_created:1;
#else /* !CONFIG_BT_CTLR_ADV_EXT */
uint16_t interval;