drivers/pinmux: stm32 fix ports_enable array definition

ports_enable array holds port clock information.
It is populated for all SoCs, but ports availability depends on
SoCs. The way it is defined today, location of the port in the
array depends on previous ports definition in SoC CMSIS files.
Though, port index is always the same irrespective of previous
ports availability in the SoC.
This will result in incoherency between port index and clock
information.
Fix this by setting a bogus value if port is not defined.
Return an error if bogus value is read.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit is contained in:
Erwan Gouriou 2018-07-31 15:49:17 +02:00 committed by Kumar Gala
commit a10d178078
2 changed files with 17 additions and 0 deletions

View file

@ -16,6 +16,9 @@
#include <gpio.h>
/* GPIO buses definitions */
#define STM32_PORT_NOT_AVAILABLE 0xFFFFFFFF
#ifdef CONFIG_SOC_SERIES_STM32F0X
#define STM32_CLOCK_BUS_GPIO STM32_CLOCK_BUS_AHB1
#define STM32_PERIPH_GPIOA LL_AHB1_GRP1_PERIPH_GPIOA

View file

@ -29,18 +29,28 @@ static const u32_t ports_enable[STM32_PORTS_MAX] = {
STM32_PERIPH_GPIOC,
#ifdef GPIOD_BASE
STM32_PERIPH_GPIOD,
#else
STM32_PORT_NOT_AVAILABLE,
#endif
#ifdef GPIOE_BASE
STM32_PERIPH_GPIOE,
#else
STM32_PORT_NOT_AVAILABLE,
#endif
#ifdef GPIOF_BASE
STM32_PERIPH_GPIOF,
#else
STM32_PORT_NOT_AVAILABLE,
#endif
#ifdef GPIOG_BASE
STM32_PERIPH_GPIOG,
#else
STM32_PORT_NOT_AVAILABLE,
#endif
#ifdef GPIOH_BASE
STM32_PERIPH_GPIOH,
#else
STM32_PORT_NOT_AVAILABLE,
#endif
};
@ -64,6 +74,10 @@ static int enable_port(u32_t port, struct device *clk)
pclken.bus = STM32_CLOCK_BUS_GPIO;
pclken.enr = ports_enable[port];
if (pclken.enr == STM32_PORT_NOT_AVAILABLE) {
return -EIO;
}
return clock_control_on(clk, (clock_control_subsys_t *) &pclken);
}