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soc: nxp: imxrt: imxrt118x: Remove cm7 core condition for CPU_HAS_ICACHE

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Although I/DCACHE aren't included under cm33 architecture,
NXP design and integrate Code Cache/Sys Cache for cm33 to
speed up the core execution efficiency.
For the convenience of developers, we believe that software
developers can directly use Code/Sys Cache as arm's I/D Cache.

Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
This commit is contained in:
Lucien Zhao 2024-12-24 14:38:24 +08:00 • committed by Benjamin Cabé
commit a101a4cdb2
1 changed files with 2 additions and 2 deletions
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4
soc/nxp/imxrt/imxrt118x/Kconfig
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@ -17,8 +17,8 @@ config SOC_SERIES_IMXRT118X
select ARM_MPU if SOC_MIMXRT1189_CM33
select INIT_ARM_PLL
select ARM_TRUSTZONE_M if SOC_MIMXRT1189_CM33
select CPU_HAS_ICACHE if SOC_MIMXRT1189_CM7
select CPU_HAS_DCACHE if SOC_MIMXRT1189_CM7
select CPU_HAS_ICACHE
select CPU_HAS_DCACHE
select CPU_HAS_FPU
select CPU_HAS_FPU_DOUBLE_PRECISION if SOC_MIMXRT1189_CM7
select HAS_MCUX_IOMUXC