x86: remove loapic_int_vec_trigger()
This was only needed for an older implementation of software interrupts, now superseded by the irq_offload() API (which doesn't interact with the interrupt controller at all) Change-Id: I8aa696d370ae1799872f6d70de69f3cb5b47456a Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
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4 changed files with 2 additions and 55 deletions
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@ -328,35 +328,6 @@ void _loapic_int_vec_set(unsigned int irq, /* IRQ number of the interrupt */
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irq_unlock(oldLevel);
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}
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/**
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*
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* @brief Trigger an interrupt from software
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*
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* This is the required method to trigger an interrupt from software,
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* use this instead of hard-coded asm "int <vector>" operations. Sends a
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* self-directed inter-processor interrupt to the LOAPIC which in turn
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* triggers the IRQ handler for the specified vector.
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*
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* @param vector IRQ vector in the IDT to trigger
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*/
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void loapic_int_vec_trigger(unsigned int vector)
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{
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uint32_t icr_cmd;
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/*
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* Bit 14 : level ASSERT (1)
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* Bit 18-19: Destination shorthand SELF (01)
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* Bit 15 : trigger mode EDGE (0)
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*
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* Destination mode ignored,
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*/
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icr_cmd = vector | (1 << 14) | (1 << 18);
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*(volatile int *)(CONFIG_LOAPIC_BASE_ADDRESS + LOAPIC_ICRLO) = icr_cmd;
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}
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/**
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*
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* @brief Enable an individual LOAPIC interrupt (IRQ)
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@ -509,22 +509,6 @@ static void _mvic_rte_update(unsigned int irq, uint32_t value, uint32_t mask)
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_mvic_rte_set(irq, (_mvic_rte_get(irq) & ~mask) | (value & mask));
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}
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void loapic_int_vec_trigger(unsigned int vector)
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{
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uint32_t icr_cmd;
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/*
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* Bit 14 : level ASSERT (1)
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* Bit 18-19: Destination shorthand SELF (01)
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* Bit 15 : trigger mode EDGE (0)
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*
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* Destination mode ignored
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*/
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icr_cmd = vector | (1 << 14) | (1 << 18);
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*(volatile int *)(CONFIG_LOAPIC_BASE_ADDRESS + LOAPIC_ICRLO) = icr_cmd;
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}
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/**
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* @brief Find the currently executing interrupt vector, if any
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*
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