x86: remove loapic_int_vec_trigger()

This was only needed for an older implementation of software interrupts,
now superseded by the irq_offload() API (which doesn't interact with
the interrupt controller at all)

Change-Id: I8aa696d370ae1799872f6d70de69f3cb5b47456a
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
This commit is contained in:
Andrew Boie 2015-12-04 11:08:23 -08:00 committed by Anas Nashif
commit a0e427f8a4
4 changed files with 2 additions and 55 deletions

View file

@ -328,35 +328,6 @@ void _loapic_int_vec_set(unsigned int irq, /* IRQ number of the interrupt */
irq_unlock(oldLevel);
}
/**
*
* @brief Trigger an interrupt from software
*
* This is the required method to trigger an interrupt from software,
* use this instead of hard-coded asm "int <vector>" operations. Sends a
* self-directed inter-processor interrupt to the LOAPIC which in turn
* triggers the IRQ handler for the specified vector.
*
* @param vector IRQ vector in the IDT to trigger
*/
void loapic_int_vec_trigger(unsigned int vector)
{
uint32_t icr_cmd;
/*
* Bit 14 : level ASSERT (1)
* Bit 18-19: Destination shorthand SELF (01)
* Bit 15 : trigger mode EDGE (0)
*
* Destination mode ignored,
*/
icr_cmd = vector | (1 << 14) | (1 << 18);
*(volatile int *)(CONFIG_LOAPIC_BASE_ADDRESS + LOAPIC_ICRLO) = icr_cmd;
}
/**
*
* @brief Enable an individual LOAPIC interrupt (IRQ)

View file

@ -509,22 +509,6 @@ static void _mvic_rte_update(unsigned int irq, uint32_t value, uint32_t mask)
_mvic_rte_set(irq, (_mvic_rte_get(irq) & ~mask) | (value & mask));
}
void loapic_int_vec_trigger(unsigned int vector)
{
uint32_t icr_cmd;
/*
* Bit 14 : level ASSERT (1)
* Bit 18-19: Destination shorthand SELF (01)
* Bit 15 : trigger mode EDGE (0)
*
* Destination mode ignored
*/
icr_cmd = vector | (1 << 14) | (1 << 18);
*(volatile int *)(CONFIG_LOAPIC_BASE_ADDRESS + LOAPIC_ICRLO) = icr_cmd;
}
/**
* @brief Find the currently executing interrupt vector, if any
*