diff --git a/include/arch/arm/aarch32/cortex_m/scripts/linker.ld b/include/arch/arm/aarch32/cortex_m/scripts/linker.ld
index 7f4bff0c75e..8a1c233a50a 100644
--- a/include/arch/arm/aarch32/cortex_m/scripts/linker.ld
+++ b/include/arch/arm/aarch32/cortex_m/scripts/linker.ld
@@ -254,16 +254,6 @@ SECTIONS
 	. = ALIGN(_region_min_align);
 	_image_ram_start = .;
 
-#if defined(CONFIG_SOC_SERIES_STM32F0X) && defined(CONFIG_SRAM_VECTOR_TABLE)
-    /* Must be first in ramable region */
-	SECTION_PROLOGUE(.st_stm32f0x_vt,(NOLOAD),)
-	{
-        _ram_vector_start = .;
-        . += _vector_end - _vector_start;
-        _ram_vector_end = .;
-	} GROUP_DATA_LINK_IN(RAMABLE_REGION, RAMABLE_REGION)
-#endif
-
 /* Located in generated directory. This file is populated by the
  * zephyr_linker_sources() Cmake function.
  */
diff --git a/soc/arm/st_stm32/stm32f0/CMakeLists.txt b/soc/arm/st_stm32/stm32f0/CMakeLists.txt
index 271d71fca16..56b5d1ffa8e 100644
--- a/soc/arm/st_stm32/stm32f0/CMakeLists.txt
+++ b/soc/arm/st_stm32/stm32f0/CMakeLists.txt
@@ -1,4 +1,10 @@
 # SPDX-License-Identifier: Apache-2.0
 
+# The vector table must be placed at the start of SRAM
+zephyr_linker_sources_ifdef(CONFIG_SRAM_VECTOR_TABLE
+  RAM_SECTIONS
+  SORT_KEY 0
+  sram_vector_table.ld
+)
 zephyr_include_directories(${ZEPHYR_BASE}/drivers)
 zephyr_sources(soc.c)
diff --git a/soc/arm/st_stm32/stm32f0/sram_vector_table.ld b/soc/arm/st_stm32/stm32f0/sram_vector_table.ld
new file mode 100644
index 00000000000..909cabed852
--- /dev/null
+++ b/soc/arm/st_stm32/stm32f0/sram_vector_table.ld
@@ -0,0 +1,13 @@
+/*
+ * Copyright (c) 2021, Commonwealth Scientific and Industrial Research
+ * Organisation (CSIRO) ABN 41 687 119 230.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+SECTION_PROLOGUE(.st_stm32f0x_vt,(NOLOAD),)
+{
+_ram_vector_start = .;
+. += _vector_end - _vector_start;
+_ram_vector_end = .;
+} GROUP_DATA_LINK_IN(RAMABLE_REGION, RAMABLE_REGION)