dts: nordic: Rename nrf5_common.dtsi to nrf_common.dtsi

This file originally added a "nordic,nrf-sw-pwm" node with a few basic
properties that were common to all nRF51 and nRF52 series SoCs. There
is no implementation of SW_PWM available for other nRF series. At the
time this file has been created, there was only nRF91 apart from nRF5x,
but when nRF53 appeared, the name of this file became misleading.
Recent addition of common disabling of the systick node made it clear
that such common file for all nRF SoCs is convenient.
To prevent further confusion, rename this file to nrf_common.dtsi and
keep there only stuff actually common to all nRF series, moving the
SW_PWM related node to particular SoCs that use it (this is actually
consistent with how all other nodes, that also have some properties
common to several or even all nRF SoCs, are defined).

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
This commit is contained in:
Andrzej Głąbek 2019-11-25 14:16:54 +01:00 committed by Anas Nashif
commit a05987ed48
15 changed files with 126 additions and 142 deletions

View file

@ -1,9 +1,7 @@
/* SPDX-License-Identifier: Apache-2.0 */
#include <arm/armv6-m.dtsi>
#include <dt-bindings/i2c/i2c.h>
#include <dt-bindings/gpio/gpio.h>
#include "nrf5_common.dtsi"
#include "nrf_common.dtsi"
/ {
chosen {
@ -221,6 +219,18 @@
label = "WDT";
};
};
sw_pwm: sw-pwm {
compatible = "nordic,nrf-sw-pwm";
status = "okay";
label = "SW_PWM";
generator = <&timer1>;
channel-count = <3>;
clock-prescaler = <0>;
ppi-base = <0>;
gpiote-base = <0>;
#pwm-cells = <1>;
};
};
&nvic {
@ -228,14 +238,3 @@
};
/delete-node/ &systick;
&sw_pwm {
generator = <&timer1>;
channel-count = <3>;
clock-prescaler = <0>;
ppi-base = <0>;
gpiote-base = <0>;
status = "okay";
#pwm-cells = <1>;
};

View file

@ -5,9 +5,7 @@
*/
#include <arm/armv7-m.dtsi>
#include <dt-bindings/i2c/i2c.h>
#include <dt-bindings/gpio/gpio.h>
#include "nrf5_common.dtsi"
#include "nrf_common.dtsi"
/ {
chosen {
@ -212,17 +210,20 @@
label = "WDT";
};
};
};
&nvic {
arm,num-irq-priority-bits = <3>;
};
&sw_pwm {
sw_pwm: sw-pwm {
compatible = "nordic,nrf-sw-pwm";
status = "disabled";
label = "SW_PWM";
generator = <&timer2>;
channel-count = <3>;
clock-prescaler = <0>;
ppi-base = <0>;
gpiote-base = <0>;
#pwm-cells = <1>;
};
};
&nvic {
arm,num-irq-priority-bits = <3>;
};

View file

@ -1,9 +1,7 @@
/* SPDX-License-Identifier: Apache-2.0 */
#include <arm/armv7-m.dtsi>
#include <dt-bindings/i2c/i2c.h>
#include <dt-bindings/gpio/gpio.h>
#include "nrf5_common.dtsi"
#include "nrf_common.dtsi"
/ {
chosen {
@ -214,17 +212,20 @@
label = "WDT";
};
};
};
&nvic {
arm,num-irq-priority-bits = <3>;
};
&sw_pwm {
sw_pwm: sw-pwm {
compatible = "nordic,nrf-sw-pwm";
status = "disabled";
label = "SW_PWM";
generator = <&timer2>;
channel-count = <3>;
clock-prescaler = <0>;
ppi-base = <0>;
gpiote-base = <0>;
#pwm-cells = <1>;
};
};
&nvic {
arm,num-irq-priority-bits = <3>;
};

View file

@ -3,10 +3,9 @@
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <arm/armv7-m.dtsi>
#include <dt-bindings/i2c/i2c.h>
#include <dt-bindings/gpio/gpio.h>
#include "nrf5_common.dtsi"
#include "nrf_common.dtsi"
/ {
chosen {
@ -237,17 +236,20 @@
label = "WDT";
};
};
};
&nvic {
arm,num-irq-priority-bits = <3>;
};
&sw_pwm {
sw_pwm: sw-pwm {
compatible = "nordic,nrf-sw-pwm";
status = "disabled";
label = "SW_PWM";
generator = <&timer2>;
channel-count = <3>;
clock-prescaler = <0>;
ppi-base = <0>;
gpiote-base = <0>;
#pwm-cells = <1>;
};
};
&nvic {
arm,num-irq-priority-bits = <3>;
};

View file

@ -5,9 +5,7 @@
*/
#include <arm/armv7-m.dtsi>
#include <dt-bindings/i2c/i2c.h>
#include <dt-bindings/gpio/gpio.h>
#include "nrf5_common.dtsi"
#include "nrf_common.dtsi"
/ {
@ -248,17 +246,20 @@
label = "WDT";
};
};
};
&nvic {
arm,num-irq-priority-bits = <3>;
};
&sw_pwm {
sw_pwm: sw-pwm {
compatible = "nordic,nrf-sw-pwm";
status = "disabled";
label = "SW_PWM";
generator = <&timer2>;
channel-count = <3>;
clock-prescaler = <0>;
ppi-base = <0>;
gpiote-base = <0>;
#pwm-cells = <1>;
};
};
&nvic {
arm,num-irq-priority-bits = <3>;
};

View file

@ -1,9 +1,7 @@
/* SPDX-License-Identifier: Apache-2.0 */
#include <arm/armv7-m.dtsi>
#include <dt-bindings/i2c/i2c.h>
#include <dt-bindings/gpio/gpio.h>
#include "nrf5_common.dtsi"
#include "nrf_common.dtsi"
/ {
chosen {
@ -312,17 +310,20 @@
label = "WDT";
};
};
};
&nvic {
arm,num-irq-priority-bits = <3>;
};
&sw_pwm {
sw_pwm: sw-pwm {
compatible = "nordic,nrf-sw-pwm";
status = "disabled";
label = "SW_PWM";
generator = <&timer2>;
channel-count = <3>;
clock-prescaler = <0>;
ppi-base = <0>;
gpiote-base = <0>;
#pwm-cells = <1>;
};
};
&nvic {
arm,num-irq-priority-bits = <3>;
};

View file

@ -5,9 +5,7 @@
*/
#include <arm/armv7-m.dtsi>
#include <dt-bindings/i2c/i2c.h>
#include <dt-bindings/gpio/gpio.h>
#include "nrf5_common.dtsi"
#include "nrf_common.dtsi"
/ {
chosen {
@ -368,17 +366,20 @@
label = "WDT";
};
};
};
&nvic {
arm,num-irq-priority-bits = <3>;
};
&sw_pwm {
sw_pwm: sw-pwm {
compatible = "nordic,nrf-sw-pwm";
status = "disabled";
label = "SW_PWM";
generator = <&timer2>;
channel-count = <3>;
clock-prescaler = <0>;
ppi-base = <0>;
gpiote-base = <0>;
#pwm-cells = <1>;
};
};
&nvic {
arm,num-irq-priority-bits = <3>;
};

View file

@ -1,9 +1,7 @@
/* SPDX-License-Identifier: Apache-2.0 */
#include <arm/armv7-m.dtsi>
#include <dt-bindings/i2c/i2c.h>
#include <dt-bindings/gpio/gpio.h>
#include "nrf5_common.dtsi"
#include "nrf_common.dtsi"
/ {
chosen {
@ -389,17 +387,20 @@
};
};
};
};
&nvic {
arm,num-irq-priority-bits = <3>;
};
&sw_pwm {
sw_pwm: sw-pwm {
compatible = "nordic,nrf-sw-pwm";
status = "disabled";
label = "SW_PWM";
generator = <&timer2>;
channel-count = <3>;
clock-prescaler = <0>;
ppi-base = <0>;
gpiote-base = <0>;
#pwm-cells = <1>;
};
};
&nvic {
arm,num-irq-priority-bits = <3>;
};

View file

@ -5,8 +5,7 @@
*/
#include <arm/armv8-m.dtsi>
#include <dt-bindings/i2c/i2c.h>
#include <dt-bindings/gpio/gpio.h>
#include "nrf_common.dtsi"
/ {
cpus {
@ -99,7 +98,3 @@
&nvic {
arm,num-irq-priority-bits = <3>;
};
&systick {
status = "disabled";
};

View file

@ -7,8 +7,7 @@
/* .dtsi header for nRF5340 CPUAPP (Application MCU), Non-Secure domain */
#include <arm/armv8-m.dtsi>
#include <dt-bindings/i2c/i2c.h>
#include <dt-bindings/gpio/gpio.h>
#include "nrf_common.dtsi"
/ {
cpus {
@ -67,7 +66,3 @@
&nvic {
arm,num-irq-priority-bits = <3>;
};
&systick {
status = "disabled";
};

View file

@ -5,8 +5,7 @@
*/
#include <arm/armv8-m.dtsi>
#include <dt-bindings/i2c/i2c.h>
#include <dt-bindings/gpio/gpio.h>
#include "nrf_common.dtsi"
/ {
chosen {
@ -257,7 +256,3 @@
&nvic {
arm,num-irq-priority-bits = <3>;
};
&systick {
status = "disabled";
};

View file

@ -1,14 +0,0 @@
/* SPDX-License-Identifier: Apache-2.0 */
/ {
sw_pwm: sw-pwm {
compatible = "nordic,nrf-sw-pwm";
status = "disabled";
label = "SW_PWM";
};
};
&systick {
status = "disabled";
};

View file

@ -5,8 +5,7 @@
*/
#include <arm/armv8-m.dtsi>
#include <dt-bindings/i2c/i2c.h>
#include <dt-bindings/gpio/gpio.h>
#include "nrf_common.dtsi"
/ {
cpus {
@ -94,7 +93,3 @@
&nvic {
arm,num-irq-priority-bits = <3>;
};
&systick {
status = "disabled";
};

View file

@ -5,8 +5,7 @@
*/
#include <arm/armv8-m.dtsi>
#include <dt-bindings/i2c/i2c.h>
#include <dt-bindings/gpio/gpio.h>
#include "nrf_common.dtsi"
/ {
cpus {
@ -60,7 +59,3 @@
&nvic {
arm,num-irq-priority-bits = <3>;
};
&systick {
status = "disabled";
};

View file

@ -0,0 +1,16 @@
/*
* Copyright (c) 2019 Nordic Semiconductor ASA
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <dt-bindings/i2c/i2c.h>
#include <dt-bindings/gpio/gpio.h>
&systick {
/*
* Nordic SoCs rely by default on the RTC for system clock
* implementation, so the SysTick node is not to be enabled.
*/
status = "disabled";
};