diff --git a/dts/arm/adi/max32/max32675-pinctrl.dtsi b/dts/arm/adi/max32/max32675-pinctrl.dtsi
new file mode 100644
index 00000000000..28920ec0b18
--- /dev/null
+++ b/dts/arm/adi/max32/max32675-pinctrl.dtsi
@@ -0,0 +1,214 @@
+/*
+ * Copyright (c) 2024 Analog Devices, Inc.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <zephyr/dt-bindings/pinctrl/max32-pinctrl.h>
+
+/ {
+	soc {
+		pinctrl: pin-controller@40008000 {
+
+			/omit-if-no-ref/ swdio_p0_0: swdio_p0_0 {
+				pinmux = <MAX32_PINMUX(0, 0, AF1)>;
+			};
+
+			/omit-if-no-ref/ tmr0c_ia_p0_0: tmr0c_ia_p0_0 {
+				pinmux = <MAX32_PINMUX(0, 0, AF3)>;
+			};
+
+			/omit-if-no-ref/ swdclk_p0_1: swdclk_p0_1 {
+				pinmux = <MAX32_PINMUX(0, 1, AF1)>;
+			};
+
+			/omit-if-no-ref/ tmr0c_oa_p0_1: tmr0c_oa_p0_1 {
+				pinmux = <MAX32_PINMUX(0, 1, AF3)>;
+			};
+
+			/omit-if-no-ref/ i2c0a_scl_p0_6: i2c0a_scl_p0_6 {
+				pinmux = <MAX32_PINMUX(0, 6, AF1)>;
+			};
+
+			/omit-if-no-ref/ lptmr0b_ia_p0_6: lptmr0b_ia_p0_6 {
+				pinmux = <MAX32_PINMUX(0, 6, AF2)>;
+			};
+
+			/omit-if-no-ref/ tmr3c_ia_p0_6: tmr3c_ia_p0_6 {
+				pinmux = <MAX32_PINMUX(0, 6, AF3)>;
+			};
+
+			/omit-if-no-ref/ i2c0a_sda_p0_7: i2c0a_sda_p0_7 {
+				pinmux = <MAX32_PINMUX(0, 7, AF1)>;
+			};
+
+			/omit-if-no-ref/ lptmr0b_oa_p0_7: lptmr0b_oa_p0_7 {
+				pinmux = <MAX32_PINMUX(0, 7, AF2)>;
+			};
+
+			/omit-if-no-ref/ tmr3c_oa_p0_7: tmr3c_oa_p0_7 {
+				pinmux = <MAX32_PINMUX(0, 7, AF3)>;
+			};
+
+			/omit-if-no-ref/ uart0a_rx_p0_8: uart0a_rx_p0_8 {
+				pinmux = <MAX32_PINMUX(0, 8, AF1)>;
+			};
+
+			/omit-if-no-ref/ i2s0b_sdo_p0_8: i2s0b_sdo_p0_8 {
+				pinmux = <MAX32_PINMUX(0, 8, AF2)>;
+			};
+
+			/omit-if-no-ref/ tmr0c_ia_p0_8: tmr0c_ia_p0_8 {
+				pinmux = <MAX32_PINMUX(0, 8, AF3)>;
+			};
+
+			/omit-if-no-ref/ uart0a_tx_p0_9: uart0a_tx_p0_9 {
+				pinmux = <MAX32_PINMUX(0, 9, AF1)>;
+			};
+
+			/omit-if-no-ref/ i2s0b_lrclk_p0_9: i2s0b_lrclk_p0_9 {
+				pinmux = <MAX32_PINMUX(0, 9, AF2)>;
+			};
+
+			/omit-if-no-ref/ tmr0c_oa_p0_9: tmr0c_oa_p0_9 {
+				pinmux = <MAX32_PINMUX(0, 9, AF3)>;
+			};
+
+			/omit-if-no-ref/ uart0a_cts_p0_10: uart0a_cts_p0_10 {
+				pinmux = <MAX32_PINMUX(0, 10, AF1)>;
+			};
+
+			/omit-if-no-ref/ i2s0b_bclk_p0_10: i2s0b_bclk_p0_10 {
+				pinmux = <MAX32_PINMUX(0, 10, AF2)>;
+			};
+
+			/omit-if-no-ref/ tmr1c_ia_p0_10: tmr1c_ia_p0_10 {
+				pinmux = <MAX32_PINMUX(0, 10, AF3)>;
+			};
+
+			/omit-if-no-ref/ ext_clk_p0_10: ext_clk_p0_10 {
+				pinmux = <MAX32_PINMUX(0, 10, AF4)>;
+			};
+
+			/omit-if-no-ref/ uart0a_rts_p0_11: uart0a_rts_p0_11 {
+				pinmux = <MAX32_PINMUX(0, 11, AF1)>;
+			};
+
+			/omit-if-no-ref/ i2s0b_sdi_p0_11: i2s0b_sdi_p0_11 {
+				pinmux = <MAX32_PINMUX(0, 11, AF2)>;
+			};
+
+			/omit-if-no-ref/ tmr1c_oa_p0_11: tmr1c_oa_p0_11 {
+				pinmux = <MAX32_PINMUX(0, 11, AF3)>;
+			};
+
+			/omit-if-no-ref/ tmr2c_oa_p0_13: tmr2c_oa_p0_13 {
+				pinmux = <MAX32_PINMUX(0, 13, AF3)>;
+			};
+
+			/omit-if-no-ref/ spi1d_ss0_p0_13: spi1d_ss0_p0_13 {
+				pinmux = <MAX32_PINMUX(0, 13, AF4)>;
+			};
+
+			/omit-if-no-ref/ spi1a_miso_p0_14: spi1a_miso_p0_14 {
+				pinmux = <MAX32_PINMUX(0, 14, AF1)>;
+			};
+
+			/omit-if-no-ref/ uart2b_rx_p0_14: uart2b_rx_p0_14 {
+				pinmux = <MAX32_PINMUX(0, 14, AF2)>;
+			};
+
+			/omit-if-no-ref/ tmr3c_ia_p0_14: tmr3c_ia_p0_14 {
+				pinmux = <MAX32_PINMUX(0, 14, AF3)>;
+			};
+
+			/omit-if-no-ref/ spi1a_mosi_p0_15: spi1a_mosi_p0_15 {
+				pinmux = <MAX32_PINMUX(0, 15, AF1)>;
+			};
+
+			/omit-if-no-ref/ uart2b_tx_p0_15: uart2b_tx_p0_15 {
+				pinmux = <MAX32_PINMUX(0, 15, AF2)>;
+			};
+
+			/omit-if-no-ref/ tmr3c_oa_p0_15: tmr3c_oa_p0_15 {
+				pinmux = <MAX32_PINMUX(0, 15, AF3)>;
+			};
+
+			/omit-if-no-ref/ spi1a_sck_p0_16: spi1a_sck_p0_16 {
+				pinmux = <MAX32_PINMUX(0, 16, AF1)>;
+			};
+
+			/omit-if-no-ref/ uart2b_cts_p0_16: uart2b_cts_p0_16 {
+				pinmux = <MAX32_PINMUX(0, 16, AF2)>;
+			};
+
+			/omit-if-no-ref/ tmr0c_ia_p0_16: tmr0c_ia_p0_16 {
+				pinmux = <MAX32_PINMUX(0, 16, AF3)>;
+			};
+
+			/omit-if-no-ref/ spi1a_ss0_p0_17: spi1a_ss0_p0_17 {
+				pinmux = <MAX32_PINMUX(0, 17, AF1)>;
+			};
+
+			/omit-if-no-ref/ uart2b_rts_p0_17: uart2b_rts_p0_17 {
+				pinmux = <MAX32_PINMUX(0, 17, AF2)>;
+			};
+
+			/omit-if-no-ref/ tmr0c_oa_p0_17: tmr0c_oa_p0_17 {
+				pinmux = <MAX32_PINMUX(0, 17, AF3)>;
+			};
+
+			/omit-if-no-ref/ i2c2a_scl_p0_18: i2c2a_scl_p0_18 {
+				pinmux = <MAX32_PINMUX(0, 18, AF1)>;
+			};
+
+			/omit-if-no-ref/ tmr1c_ia_p0_18: tmr1c_ia_p0_18 {
+				pinmux = <MAX32_PINMUX(0, 18, AF3)>;
+			};
+
+			/omit-if-no-ref/ i2c2a_sda_p0_19: i2c2a_sda_p0_19 {
+				pinmux = <MAX32_PINMUX(0, 19, AF1)>;
+			};
+
+			/omit-if-no-ref/ tmr1c_oa_p0_19: tmr1c_oa_p0_19 {
+				pinmux = <MAX32_PINMUX(0, 19, AF3)>;
+			};
+
+			/omit-if-no-ref/ cm4_tx_p0_21: cm4_tx_p0_21 {
+				pinmux = <MAX32_PINMUX(0, 21, AF1)>;
+			};
+
+			/omit-if-no-ref/ tmr2c_oa_p0_21: tmr2c_oa_p0_21 {
+				pinmux = <MAX32_PINMUX(0, 21, AF3)>;
+			};
+
+			/omit-if-no-ref/ tmr3c_oa_p0_31: tmr3c_oa_p0_31 {
+				pinmux = <MAX32_PINMUX(0, 31, AF3)>;
+			};
+
+			/omit-if-no-ref/ uart2a_rx_p1_8: uart2a_rx_p1_8 {
+				pinmux = <MAX32_PINMUX(1, 8, AF1)>;
+			};
+
+			/omit-if-no-ref/ uart2b_rts_p1_8: uart2b_rts_p1_8 {
+				pinmux = <MAX32_PINMUX(1, 8, AF2)>;
+			};
+
+			/omit-if-no-ref/ uart2a_tx_p1_9: uart2a_tx_p1_9 {
+				pinmux = <MAX32_PINMUX(1, 9, AF1)>;
+			};
+
+			/omit-if-no-ref/ uart2a_cts_p1_10: uart2a_cts_p1_10 {
+				pinmux = <MAX32_PINMUX(1, 10, AF1)>;
+			};
+
+			/omit-if-no-ref/ uart2a_rts_p1_11: uart2a_rts_p1_11 {
+				pinmux = <MAX32_PINMUX(1, 11, AF1)>;
+			};
+
+			/omit-if-no-ref/ tmr2c_oa_p1_11: tmr2c_oa_p1_11 {
+				pinmux = <MAX32_PINMUX(1, 11, AF3)>;
+			};
+		};
+	};
+};
diff --git a/dts/arm/adi/max32/max32675.dtsi b/dts/arm/adi/max32/max32675.dtsi
new file mode 100644
index 00000000000..8ab6a74f035
--- /dev/null
+++ b/dts/arm/adi/max32/max32675.dtsi
@@ -0,0 +1,63 @@
+/*
+ * Copyright (c) 2024 Analog Devices, Inc.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <arm/armv7-m.dtsi>
+#include <adi/max32/max32xxx.dtsi>
+
+&flash0 {
+	reg = <0x10000000 DT_SIZE_K(384)>;
+};
+
+&sram0 {
+	reg = <0x20000000 DT_SIZE_K(16)>;
+};
+
+&clk_inro {
+	clock-frequency = <DT_FREQ_K(80)>;
+};
+
+/delete-node/ &clk_iso;
+/delete-node/ &uart1;
+
+/* MAX32675 extra peripherals. */
+/ {
+	soc {
+		sram1: memory@20004000 {
+			compatible = "mmio-sram";
+			reg = <0x20004000 DT_SIZE_K(16)>;
+		};
+
+		sram2: memory@20008000 {
+			compatible = "mmio-sram";
+			reg = <0x20008000 DT_SIZE_K(32)>;
+		};
+
+		sram3: memory@20010000 {
+			compatible = "mmio-sram";
+			reg = <0x20010000 DT_SIZE_K(64)>;
+		};
+
+		sram4: memory@20020000 {
+			compatible = "mmio-sram";
+			reg = <0x20020000 DT_SIZE_K(4)>;
+		};
+
+		sram5: memory@20021000 {
+			compatible = "mmio-sram";
+			reg = <0x20021000 DT_SIZE_K(4)>;
+		};
+
+		sram6: memory@20022000 {
+			compatible = "mmio-sram";
+			reg = <0x20022000 DT_SIZE_K(8)>;
+		};
+
+		sram7: memory@20024000 {
+			compatible = "mmio-sram";
+			reg = <0x20024000 DT_SIZE_K(16)>;
+		};
+	};
+};
diff --git a/soc/adi/max32/Kconfig b/soc/adi/max32/Kconfig
index a6e6d06d432..d6121843495 100644
--- a/soc/adi/max32/Kconfig
+++ b/soc/adi/max32/Kconfig
@@ -20,6 +20,9 @@ config SOC_MAX32670
 config SOC_MAX32672
 	select CPU_CORTEX_M4
 
+config SOC_MAX32675
+	select CPU_CORTEX_M4
+
 config SOC_MAX32680
 	select CPU_CORTEX_M4
 
diff --git a/soc/adi/max32/Kconfig.defconfig.max32675 b/soc/adi/max32/Kconfig.defconfig.max32675
new file mode 100644
index 00000000000..3718cef9549
--- /dev/null
+++ b/soc/adi/max32/Kconfig.defconfig.max32675
@@ -0,0 +1,14 @@
+# Analog Devices MAX32675 MCU
+
+# Copyright (c) 2024 Analog Devices, Inc.
+# SPDX-License-Identifier: Apache-2.0
+
+if SOC_MAX32675
+
+config SYS_CLOCK_HW_CYCLES_PER_SEC
+	default $(dt_node_int_prop_int,/clocks/clk_ipo,clock-frequency)
+
+config NUM_IRQS
+	default 100
+
+endif # SOC_MAX32675
diff --git a/soc/adi/max32/Kconfig.soc b/soc/adi/max32/Kconfig.soc
index 19743fc1a0d..2a1f5f0a9cc 100644
--- a/soc/adi/max32/Kconfig.soc
+++ b/soc/adi/max32/Kconfig.soc
@@ -25,6 +25,10 @@ config SOC_MAX32672
 	bool
 	select SOC_FAMILY_MAX32
 
+config SOC_MAX32675
+	bool
+	select SOC_FAMILY_MAX32
+
 config SOC_MAX32680
 	bool
 	select SOC_FAMILY_MAX32
@@ -45,5 +49,6 @@ config SOC
 	default "max32655" if SOC_MAX32655
 	default "max32670" if SOC_MAX32670
 	default "max32672" if SOC_MAX32672
+	default "max32675" if SOC_MAX32675
 	default "max32680" if SOC_MAX32680
 	default "max32690" if SOC_MAX32690
diff --git a/soc/adi/max32/soc.yml b/soc/adi/max32/soc.yml
index 65c999cc35c..ba1d3d80016 100644
--- a/soc/adi/max32/soc.yml
+++ b/soc/adi/max32/soc.yml
@@ -9,6 +9,7 @@ family:
     - name: m4
   - name: max32670
   - name: max32672
+  - name: max32675
   - name: max32680
     cpuclusters:
     - name: m4