disk: sdhc: Switch to clock frequency from DTS
The "spi-max-frequency" property already exists, but was unused. This now sets the SPI clock frequency to this value (limited to 24MHz) once initialisation is complete. Due to the nature of the SPI API, it is necessary to have two separate configuration structures to switch clock speed as some SPI drivers only compare pointers to detect changes. Fixes: #32996 Signed-off-by: Rich Barlow <rich@bennellick.com>
This commit is contained in:
Rich Barlow
Anas Nashif
parent
d9f40d53a6
commit
9f2a65e74e
1 changed files with 70 additions and 39 deletions
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@ -18,9 +18,11 @@ LOG_MODULE_REGISTER(sdmmc_spi, CONFIG_SDMMC_LOG_LEVEL);
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#include "sdmmc_sdhc.h"
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/* Clock speed used during initialisation */
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#define SDHC_SPI_INITIAL_SPEED 400000
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/* Clock speed used after initialisation */
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#define SDHC_SPI_SPEED 4000000
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#define SDHC_SPI_INIT_SPEED KHZ(400)
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/* Maximum clock speed used after initialisation (actual speed set in DTS).
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* SD Specifications Part 1 Physical layer states 25MHz maximum.
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*/
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#define SDHC_SPI_MAX_OPER_SPEED MHZ(25)
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#define SPI_SDHC_NODE DT_DRV_INST(0)
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@ -29,10 +31,7 @@ LOG_MODULE_REGISTER(sdmmc_spi, CONFIG_SDMMC_LOG_LEVEL);
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#else
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struct sdhc_spi_data {
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const struct device *spi;
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struct spi_config cfg;
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#if DT_SPI_DEV_HAS_CS_GPIOS(SPI_SDHC_NODE)
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struct spi_cs_control cs;
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#endif
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const struct spi_config *spi_cfg;
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bool high_capacity;
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uint32_t sector_count;
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uint8_t status;
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@ -41,6 +40,27 @@ struct sdhc_spi_data {
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#endif
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};
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struct sdhc_spi_config {
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struct spi_config init_cfg;
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struct spi_config oper_cfg;
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#if DT_SPI_DEV_HAS_CS_GPIOS(SPI_SDHC_NODE)
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struct spi_cs_control cs;
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#endif
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};
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static void sdhc_spi_set_status(const struct device *dev, uint8_t status)
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{
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struct sdhc_spi_data *data = dev->data;
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const struct sdhc_spi_config *cfg = dev->config;
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data->status = status;
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if (status == DISK_STATUS_UNINIT) {
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data->spi_cfg = &cfg->init_cfg;
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} else if (status == DISK_STATUS_OK) {
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data->spi_cfg = &cfg->oper_cfg;
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}
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}
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/* Traces card traffic for LOG_LEVEL_DBG */
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static int sdhc_spi_trace(struct sdhc_spi_data *data, int dir, int err,
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const uint8_t *buf, int len)
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@ -98,7 +118,7 @@ static int sdhc_spi_rx_bytes(struct sdhc_spi_data *data, uint8_t *buf, int len)
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};
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return sdhc_spi_trace(data, -1,
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spi_transceive(data->spi, &data->cfg, &tx, &rx),
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spi_transceive(data->spi, data->spi_cfg, &tx, &rx),
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buf, len);
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}
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@ -131,7 +151,7 @@ static int sdhc_spi_tx(struct sdhc_spi_data *data, const uint8_t *buf, int len)
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};
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return sdhc_spi_trace(data, 1,
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spi_write(data->spi, &data->cfg, &tx), buf,
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spi_write(data->spi, data->spi_cfg, &tx), buf,
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len);
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}
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@ -396,7 +416,7 @@ static int sdhc_spi_rx_block(struct sdhc_spi_data *data,
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};
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err = sdhc_spi_trace(data, -1,
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spi_transceive(data->spi, &data->cfg,
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spi_transceive(data->spi, data->spi_cfg,
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&tx, &rx),
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&buf[i], remain);
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if (err != 0) {
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@ -459,7 +479,7 @@ static int sdhc_spi_go_idle(struct sdhc_spi_data *data)
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{
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/* Write the initial >= 74 clocks */
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sdhc_spi_tx(data, sdhc_ones, 10);
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spi_release(data->spi, &data->cfg);
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spi_release(data->spi, data->spi_cfg);
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return sdhc_spi_cmd_r1_idle(data, SDHC_GO_IDLE_STATE, 0);
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}
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@ -491,8 +511,10 @@ static int sdhc_spi_check_interface(struct sdhc_spi_data *data)
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}
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/* Detect and initialise the card */
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static int sdhc_spi_detect(struct sdhc_spi_data *data)
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static int sdhc_spi_detect(const struct device *dev)
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{
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struct sdhc_spi_data *data = dev->data;
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int err;
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uint32_t ocr;
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struct sdhc_retry retry;
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@ -503,8 +525,7 @@ static int sdhc_spi_detect(struct sdhc_spi_data *data)
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uint8_t buf[SDHC_CSD_SIZE];
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bool is_v2;
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data->cfg.frequency = SDHC_SPI_INITIAL_SPEED;
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data->status = DISK_STATUS_UNINIT;
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sdhc_spi_set_status(dev, DISK_STATUS_UNINIT);
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sdhc_retry_init(&retry, SDHC_INIT_TIMEOUT, SDHC_RETRY_DELAY);
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@ -641,8 +662,7 @@ static int sdhc_spi_detect(struct sdhc_spi_data *data)
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buf[7], buf[8], sys_get_be32(&buf[9]));
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/* Initilisation complete */
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data->cfg.frequency = SDHC_SPI_SPEED;
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data->status = DISK_STATUS_OK;
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sdhc_spi_set_status(dev, DISK_STATUS_OK);
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return 0;
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}
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@ -690,7 +710,7 @@ static int sdhc_spi_read(struct sdhc_spi_data *data,
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err = sdhc_spi_skip_until_ready(data);
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error:
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spi_release(data->spi, &data->cfg);
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spi_release(data->spi, data->spi_cfg);
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return err;
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}
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@ -745,7 +765,7 @@ static int sdhc_spi_write(struct sdhc_spi_data *data,
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err = 0;
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error:
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spi_release(data->spi, &data->cfg);
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spi_release(data->spi, data->spi_cfg);
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return err;
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}
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@ -824,7 +844,7 @@ static int sdhc_spi_write_multi(struct sdhc_spi_data *data,
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err = 0;
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exit:
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spi_release(data->spi, &data->cfg);
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spi_release(data->spi, data->spi_cfg);
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return err;
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}
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@ -837,20 +857,6 @@ static int sdhc_spi_init(const struct device *dev)
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data->spi = device_get_binding(DT_BUS_LABEL(SPI_SDHC_NODE));
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data->cfg.frequency = SDHC_SPI_INITIAL_SPEED;
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data->cfg.operation = SPI_WORD_SET(8) | SPI_HOLD_ON_CS;
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data->cfg.slave = DT_REG_ADDR(SPI_SDHC_NODE);
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#if DT_SPI_DEV_HAS_CS_GPIOS(SPI_SDHC_NODE)
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data->cs.gpio_dev =
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device_get_binding(DT_SPI_DEV_CS_GPIOS_LABEL(SPI_SDHC_NODE));
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__ASSERT_NO_MSG(data->cs.gpio_dev != NULL);
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data->cs.gpio_pin = DT_SPI_DEV_CS_GPIOS_PIN(SPI_SDHC_NODE);
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data->cs.gpio_dt_flags = DT_SPI_DEV_CS_GPIOS_FLAGS(SPI_SDHC_NODE);
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data->cfg.cs = &data->cs;
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#endif
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disk_spi_sdhc_init(dev);
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return 0;
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@ -947,8 +953,8 @@ static int disk_spi_sdhc_access_init(struct disk_info *disk)
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struct sdhc_spi_data *data = dev->data;
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int err;
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err = sdhc_spi_detect(data);
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spi_release(data->spi, &data->cfg);
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err = sdhc_spi_detect(dev);
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spi_release(data->spi, data->spi_cfg);
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return err;
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}
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@ -968,9 +974,7 @@ static struct disk_info spi_sdhc_disk = {
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static int disk_spi_sdhc_init(const struct device *dev)
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{
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struct sdhc_spi_data *data = dev->data;
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data->status = DISK_STATUS_UNINIT;
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sdhc_spi_set_status(dev, DISK_STATUS_UNINIT);
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spi_sdhc_disk.dev = dev;
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@ -979,7 +983,34 @@ static int disk_spi_sdhc_init(const struct device *dev)
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static struct sdhc_spi_data sdhc_spi_data_0;
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static const struct sdhc_spi_config sdhc_spi_cfg_0 = {
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.init_cfg = {
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.frequency = SDHC_SPI_INIT_SPEED,
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.operation = SPI_WORD_SET(8) | SPI_HOLD_ON_CS,
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.slave = DT_REG_ADDR(SPI_SDHC_NODE),
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#if DT_SPI_DEV_HAS_CS_GPIOS(SPI_SDHC_NODE)
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.cs = &sdhc_spi_cfg_0.cs,
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#endif
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},
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.oper_cfg = {
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.frequency = MIN(SDHC_SPI_MAX_OPER_SPEED,
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DT_INST_PROP(0, spi_max_frequency)),
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.operation = SPI_WORD_SET(8) | SPI_HOLD_ON_CS,
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.slave = DT_REG_ADDR(SPI_SDHC_NODE),
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#if DT_SPI_DEV_HAS_CS_GPIOS(SPI_SDHC_NODE)
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.cs = &sdhc_spi_cfg_0.cs,
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#endif
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},
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#if DT_SPI_DEV_HAS_CS_GPIOS(SPI_SDHC_NODE)
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.cs = {
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.gpio_dev = DEVICE_DT_GET(DT_SPI_DEV_CS_GPIOS_CTLR(SPI_SDHC_NODE)),
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.gpio_pin = DT_SPI_DEV_CS_GPIOS_PIN(SPI_SDHC_NODE),
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.gpio_dt_flags = DT_SPI_DEV_CS_GPIOS_FLAGS(SPI_SDHC_NODE),
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},
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#endif
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};
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DEVICE_DT_INST_DEFINE(0, sdhc_spi_init, device_pm_control_nop,
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&sdhc_spi_data_0, NULL,
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&sdhc_spi_data_0, &sdhc_spi_cfg_0,
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POST_KERNEL, CONFIG_SDMMC_INIT_PRIORITY, NULL);
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#endif
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