drivers: serial: uart_pl011: remove shared irq support

The shared irq support isn't needed in this driver.  We just need to
deal with the fact that some SoCs have only a single interrupt line and
some have three interrupts.  We can just ifdef that based on
DT_NUM_IRQS.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>

boards/arm/qemu_cortex_a53/qemu_cortex_a53_defconfig

@@ -9,7 +9,6 @@ CONFIG_SRAM_SIZE=131072
 
 # Enable UART driver
 CONFIG_SERIAL=y
-CONFIG_SHARED_IRQ=y
 
 # Enable console
 CONFIG_CONSOLE=y
@@ -19,5 +18,3 @@ CONFIG_UART_CONSOLE=y
 CONFIG_UART_PL011=y
 CONFIG_UART_PL011_PORT0=y
 CONFIG_UART_INTERRUPT_DRIVEN=y
-CONFIG_SHARED_IRQ_0=y
-CONFIG_UART_PL011_PORT0_SHARED_IRQ=y

drivers/serial/Kconfig.pl011

@@ -20,25 +20,4 @@ config UART_PL011_PORT1
 	help
 	  Build the driver to utilize UART controller Port 1.
 
-config UART_PL011_SHARED_IRQ
-	bool
-
-config UART_PL011_PORT0_SHARED_IRQ
-	bool "Shared IRQ for UART 0"
-	depends on SHARED_IRQ_0
-	depends on UART_PL011_PORT0
-	select UART_PL011_SHARED_IRQ
-	help
-	  When interrupts fire, the shared IRQ driver is notified. Then the shared IRQ
-	  driver dispatches the interrupt to the UART driver.
-
-config UART_PL011_PORT1_SHARED_IRQ
-	bool "Shared IRQ for UART 1"
-	depends on SHARED_IRQ_1
-	depends on UART_PL011_PORT1
-	select UART_PL011_SHARED_IRQ
-	help
-	  When interrupts fire, the shared IRQ driver is notified. Then the shared IRQ
-	  driver dispatches the interrupt to the UART driver.
-
 endif # UART_PL011

drivers/serial/uart_pl011.c

@@ -11,10 +11,6 @@
 #include <soc.h>
 #include <drivers/uart.h>
 
-#if defined(CONFIG_SHARED_IRQ)
-#include <shared_irq.h>
-#endif
-
 /*
  * UART PL011 register map structure
  */
@@ -46,9 +42,6 @@ struct pl011_data {
 #ifdef CONFIG_UART_INTERRUPT_DRIVEN
 	uart_irq_callback_user_data_t irq_cb;
 	void *irq_cb_data;
-#if defined(CONFIG_UART_PL011_SHARED_IRQ)
-	char *shared_irq_dev_name;
-#endif
 #endif
 };
 
@@ -429,9 +422,6 @@ static struct uart_device_config pl011_cfg_port_0 = {
 
 static struct pl011_data pl011_data_port_0 = {
 	.baud_rate = DT_INST_0_ARM_PL011_CURRENT_SPEED,
-#if defined(CONFIG_UART_PL011_SHARED_IRQ)
-	.shared_irq_dev_name = DT_INST_0_SHARED_IRQ_LABEL,
-#endif
 };
 
 DEVICE_AND_API_INIT(pl011_port_0,
@@ -445,13 +435,13 @@ DEVICE_AND_API_INIT(pl011_port_0,
 #ifdef CONFIG_UART_INTERRUPT_DRIVEN
 static void pl011_irq_config_func_0(struct device *dev)
 {
-#if defined(CONFIG_UART_PL011_PORT0_SHARED_IRQ)
+#if DT_NUM_IRQS(DT_INST(0, arm_pl011)) == 1
-	struct device *shared_irq_dev;
+	IRQ_CONNECT(DT_INST_0_ARM_PL011_IRQ_0,
-
+		    DT_INST_0_ARM_PL011_IRQ_0_PRIORITY,
-	shared_irq_dev = device_get_binding(DEV_DATA(dev)->shared_irq_dev_name);
+		    pl011_isr,
-	__ASSERT(shared_irq_dev != NULL, "Failed to get shared irq");
+		    DEVICE_GET(pl011_port_0),
-	shared_irq_isr_register(shared_irq_dev, (isr_t)pl011_isr, dev);
+		    0);
-	shared_irq_enable(shared_irq_dev, dev);
+	irq_enable(DT_INST_0_ARM_PL011_IRQ_0);
 #else
 	IRQ_CONNECT(DT_INST_0_ARM_PL011_IRQ_TX,
 		    DT_INST_0_ARM_PL011_IRQ_TX_PRIORITY,
@@ -495,9 +485,6 @@ static struct uart_device_config pl011_cfg_port_1 = {
 
 static struct pl011_data pl011_data_port_1 = {
 	.baud_rate = DT_INST_1_ARM_PL011_CURRENT_SPEED,
-#if defined(CONFIG_UART_PL011_SHARED_IRQ)
-	.shared_irq_dev_name = DT_INST_1_SHARED_IRQ_LABEL,
-#endif
 };
 
 DEVICE_AND_API_INIT(pl011_port_1,
@@ -511,13 +498,13 @@ DEVICE_AND_API_INIT(pl011_port_1,
 #ifdef CONFIG_UART_INTERRUPT_DRIVEN
 static void pl011_irq_config_func_1(struct device *dev)
 {
-#if defined(CONFIG_UART_PL011_PORT1_SHARED_IRQ)
+#if DT_NUM_IRQS(DT_INST(1, arm_pl011)) == 1
-	struct device *shared_irq_dev;
+	IRQ_CONNECT(DT_INST_1_ARM_PL011_IRQ_0,
-
+		    DT_INST_1_ARM_PL011_IRQ_0_PRIORITY,
-	shared_irq_dev = device_get_binding(DEV_DATA(dev)->shared_irq_dev_name);
+		    pl011_isr,
-	__ASSERT(shared_irq_dev != NULL, "Failed to get shared irq");
+		    DEVICE_GET(pl011_port_1),
-	shared_irq_isr_register(shared_irq_dev, (isr_t)pl011_isr, dev);
+		    0);
-	shared_irq_enable(shared_irq_dev, dev);
+	irq_enable(DT_INST_1_ARM_PL011_IRQ_0);
 #else
 	IRQ_CONNECT(DT_INST_1_ARM_PL011_IRQ_TX,
 		    DT_INST_1_ARM_PL011_IRQ_TX_PRIORITY,

dts/arm/qemu-virt/qemu-virt-a53.dtsi

@@ -58,15 +58,6 @@
 			label = "UART_0";
 		};
 
-		sharedirq0: sharedirq0 {
-			compatible = "shared-irq";
-			label = "SHARED_IRQ";
-			interrupts = <GIC_SPI 1 0 IRQ_TYPE_LEVEL>;
-			interrupt-controller;
-			#interrupt-cells = <0>;
-			status = "okay";
-		};
-
 		flash0: flash@0 {
 			compatible = "soc-nv-flash";
 			reg = <0x0 DT_SIZE_K(64)>;

soc/arm/qemu_cortex_a53/dts_fixup.h

@@ -1,7 +0,0 @@
-/*
- * Copyright (c) 2019 Carlo Caione <ccaione@baylibre.com>
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-
-#define DT_INST_0_SHARED_IRQ_IRQ_0_SENSE	DT_INST_0_SHARED_IRQ_IRQ_0_FLAGS

soc/arm/qemu_cortex_a53/mmu_regions.c

@@ -6,7 +6,6 @@
  */
 #include <soc.h>
 #include <arch/arm/aarch64/arm_mmu.h>
-#include <dts_fixup.h>
 
 #define SZ_1K	1024