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drivers: pcie: Add support for IRQ allocation management

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There are x86 platforms where the IRQ configuration register for PCIe
is not pre-populated and the OS needs to assign a number dynamically
by writing to the register.

In order to allocate interrupts we have to know which ones have been
hard-coded in device tree. We accomplish this by collecting these
values through the IRQ_CONNECT() macro and placing them in a dedicated
linker section (in ROM).

The full set of allocated interrupts are managed through a bitmap, and
the pre-allocated values (from the linker section) are inserted into
this upon initial runtime access.

This patch introduces a new pcie_alloc_irq() API that drivers can use
to allocate interrupt line numbers. The two in-tree drivers that were
using this API (I2C and UART) are converted to use the new API.

Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
This commit is contained in:
Johan Hedberg 2020-11-10 16:26:05 +02:00 • committed by Johan Hedberg
commit 9e4dfd8f4e
4 changed files with 107 additions and 0 deletions
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9
include/linker/common-rom.ld
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@ -138,6 +138,15 @@
Z_ITERABLE_SECTION_ROM(dns_sd_rec, 4)
#endif
#if defined(CONFIG_PCIE)
SECTION_DATA_PROLOGUE(irq_alloc,,)
{
__irq_alloc_start = .;
KEEP(*(SORT_BY_NAME("._irq_alloc*")));
__irq_alloc_end = .;
} GROUP_LINK_IN(ROMABLE_REGION)
#endif /* CONFIG_PCIE */
SECTION_DATA_PROLOGUE(log_const_sections,,)
{
__log_const_start = .;