drivers: pcie: Add support for IRQ allocation management
There are x86 platforms where the IRQ configuration register for PCIe is not pre-populated and the OS needs to assign a number dynamically by writing to the register. In order to allocate interrupts we have to know which ones have been hard-coded in device tree. We accomplish this by collecting these values through the IRQ_CONNECT() macro and placing them in a dedicated linker section (in ROM). The full set of allocated interrupts are managed through a bitmap, and the pre-allocated values (from the linker section) are inserted into this upon initial runtime access. This patch introduces a new pcie_alloc_irq() API that drivers can use to allocate interrupt line numbers. The two in-tree drivers that were using this API (I2C and UART) are converted to use the new API. Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
This commit is contained in:
parent
c8bbd412c7
commit
9e4dfd8f4e
4 changed files with 107 additions and 0 deletions
|
@ -93,11 +93,20 @@ struct x86_ssf {
|
|||
|
||||
#endif /* _ASMLANGUAGE */
|
||||
|
||||
#ifdef CONFIG_PCIE
|
||||
#define X86_RESERVE_IRQ(irq_p, name) \
|
||||
static Z_DECL_ALIGN(uint8_t) name \
|
||||
__in_section(_irq_alloc, static, name) __used = irq_p
|
||||
#else
|
||||
#define X86_RESERVE_IRQ(irq_p, name)
|
||||
#endif
|
||||
|
||||
/*
|
||||
* All Intel64 interrupts are dynamically connected.
|
||||
*/
|
||||
|
||||
#define ARCH_IRQ_CONNECT(irq_p, priority_p, isr_p, isr_param_p, flags_p) \
|
||||
X86_RESERVE_IRQ(irq_p, _CONCAT(_irq_alloc_fixed, __COUNTER__)); \
|
||||
arch_irq_connect_dynamic(irq_p, priority_p, \
|
||||
(void (*)(const void *))isr_p, \
|
||||
isr_param_p, flags_p)
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue