diff --git a/soc/arm/st_stm32/stm32wb/dts_fixup.h b/soc/arm/st_stm32/stm32wb/dts_fixup.h
index 3035f633b56..50d962e2f02 100644
--- a/soc/arm/st_stm32/stm32wb/dts_fixup.h
+++ b/soc/arm/st_stm32/stm32wb/dts_fixup.h
@@ -110,4 +110,18 @@
 #define DT_I2C_3_CLOCK_BITS			DT_ST_STM32_I2C_V2_40005C00_CLOCK_BITS
 #define DT_I2C_3_CLOCK_BUS			DT_ST_STM32_I2C_V2_40005C00_CLOCK_BUS
 
+#define DT_SPI_1_BASE_ADDRESS			DT_ST_STM32_SPI_FIFO_40013000_BASE_ADDRESS
+#define DT_SPI_1_IRQ_PRI			DT_ST_STM32_SPI_FIFO_40013000_IRQ_0_PRIORITY
+#define DT_SPI_1_NAME				DT_ST_STM32_SPI_FIFO_40013000_LABEL
+#define DT_SPI_1_IRQ				DT_ST_STM32_SPI_FIFO_40013000_IRQ_0
+#define DT_SPI_1_CLOCK_BITS			DT_ST_STM32_SPI_FIFO_40013000_CLOCK_BITS
+#define DT_SPI_1_CLOCK_BUS			DT_ST_STM32_SPI_FIFO_40013000_CLOCK_BUS
+
+#define DT_SPI_2_BASE_ADDRESS			DT_ST_STM32_SPI_FIFO_40003800_BASE_ADDRESS
+#define DT_SPI_2_IRQ_PRI			DT_ST_STM32_SPI_FIFO_40003800_IRQ_0_PRIORITY
+#define DT_SPI_2_NAME				DT_ST_STM32_SPI_FIFO_40003800_LABEL
+#define DT_SPI_2_IRQ				DT_ST_STM32_SPI_FIFO_40003800_IRQ_0
+#define DT_SPI_2_CLOCK_BITS			DT_ST_STM32_SPI_FIFO_40003800_CLOCK_BITS
+#define DT_SPI_2_CLOCK_BUS			DT_ST_STM32_SPI_FIFO_40003800_CLOCK_BUS
+
 /* End of SoC Level DTS fixup file */
diff --git a/soc/arm/st_stm32/stm32wb/soc.h b/soc/arm/st_stm32/stm32wb/soc.h
index aa692a7add6..ae9ada04dc4 100644
--- a/soc/arm/st_stm32/stm32wb/soc.h
+++ b/soc/arm/st_stm32/stm32wb/soc.h
@@ -57,6 +57,10 @@
 #include <stm32wbxx_ll_i2c.h>
 #endif
 
+#ifdef CONFIG_SPI_STM32
+#include <stm32wbxx_ll_spi.h>
+#endif /* CONFIG_SPI_STM32 */
+
 #endif /* !_ASMLANGUAGE */
 
 #endif /* _STM32WBX_SOC_H_ */