drivers: timer: st_stm32: add lptimer management to stm32l5 series
This patch introduces the support of the LowPower Timer for the STM32L5xx from STMicroelectronics. Signed-off-by: Francois Ramu <francois.ramu@st.com>
This commit is contained in:
parent
fa30e879ee
commit
9d2aead97b
2 changed files with 5 additions and 1 deletions
|
@ -5,7 +5,7 @@
|
|||
|
||||
menuconfig STM32_LPTIM_TIMER
|
||||
bool "STM32 Low Power Timer [EXPERIMENTAL]"
|
||||
depends on (SOC_SERIES_STM32L4X || SOC_SERIES_STM32WBX)
|
||||
depends on (SOC_SERIES_STM32L4X || SOC_SERIES_STM32L5X || SOC_SERIES_STM32WBX)
|
||||
depends on CLOCK_CONTROL && PM
|
||||
select TICKLESS_CAPABLE
|
||||
help
|
||||
|
|
|
@ -105,6 +105,7 @@ int sys_clock_driver_init(const struct device *dev)
|
|||
/* Enable the power interface clock */
|
||||
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_PWR);
|
||||
#endif /* LL_APB1_GRP1_PERIPH_PWR */
|
||||
|
||||
/* enable backup domain */
|
||||
LL_PWR_EnableBkUpAccess();
|
||||
|
||||
|
@ -114,6 +115,9 @@ int sys_clock_driver_init(const struct device *dev)
|
|||
while (!LL_RCC_LSE_IsReady()) {
|
||||
/* Wait for LSE ready */
|
||||
}
|
||||
#ifdef RCC_BDCR_LSESYSEN
|
||||
LL_RCC_LSE_EnablePropagation();
|
||||
#endif /* RCC_BDCR_LSESYSEN */
|
||||
LL_RCC_SetLPTIMClockSource(LL_RCC_LPTIM1_CLKSOURCE_LSE);
|
||||
|
||||
#endif /* CONFIG_STM32_LPTIM_CLOCK_LSI */
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue