drivers: usb: udc: change numaker m46x usbd clock source to hirc48m
Change NuMaker M463/M467 series USBD clock source to HIRC48M. This makes core-clock and its clock source PLL not required to be multiple of 48MHz. Signed-off-by: Chun-Chieh Li <ccli8@nuvoton.com>
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3b1d2bb286
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2 changed files with 4 additions and 5 deletions
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@ -65,8 +65,6 @@
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};
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};
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&scc {
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&scc {
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/* For USB 1.1 Host/Device/OTG, configure to 192MHz, which can generate necessary 48MHz. */
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/* For USB 2.0 Host/Device/OTG or no USB application, comment out to use default. */
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core-clock = <192000000>;
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core-clock = <192000000>;
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};
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};
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@ -122,7 +120,7 @@
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status = "okay";
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status = "okay";
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};
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};
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/* On enabled, 'core-clock', as above, is required to be 192MHz. */
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/* On enabled, usbd is required to be clocked in 48MHz. */
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zephyr_udc0: &usbd {
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zephyr_udc0: &usbd {
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pinctrl-0 = <&usbd_default>;
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pinctrl-0 = <&usbd_default>;
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pinctrl-names = "default";
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pinctrl-names = "default";
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@ -51,6 +51,7 @@
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#clock-cells = <0>;
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#clock-cells = <0>;
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/* hxt = "enable"; */
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/* hxt = "enable"; */
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lxt = "enable";
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lxt = "enable";
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hirc48m = "enable";
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clk-pclkdiv = <(NUMAKER_CLK_PCLKDIV_APB0DIV_DIV2 |
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clk-pclkdiv = <(NUMAKER_CLK_PCLKDIV_APB0DIV_DIV2 |
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NUMAKER_CLK_PCLKDIV_APB1DIV_DIV2)>;
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NUMAKER_CLK_PCLKDIV_APB1DIV_DIV2)>;
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core-clock = <200000000>;
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core-clock = <200000000>;
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@ -606,8 +607,8 @@
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reg = <0x400c0000 0x1000>;
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reg = <0x400c0000 0x1000>;
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interrupts = <53 0>;
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interrupts = <53 0>;
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resets = <&rst NUMAKER_USBD_RST>;
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resets = <&rst NUMAKER_USBD_RST>;
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clocks = <&pcc NUMAKER_USBD_MODULE NUMAKER_CLK_CLKSEL0_USBSEL_PLL_DIV2
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clocks = <&pcc NUMAKER_USBD_MODULE NUMAKER_CLK_CLKSEL0_USBSEL_HIRC48M
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NUMAKER_CLK_CLKDIV0_USB(2)>;
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NUMAKER_CLK_CLKDIV0_USB(1)>;
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dma-buffer-size = <1536>;
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dma-buffer-size = <1536>;
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status = "disabled";
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status = "disabled";
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num-bidir-endpoints = <25>;
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num-bidir-endpoints = <25>;
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