ARC: SMP: debug: workaround MDB changing debug_select value
MDB debugger may modify debug_select and debug_mask registers on start, so we can't rely on debug_select reset value. Let's set correct value on primary CPU without reading initial value from debug_select. Internal ID: P10019563-50516 Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
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1 changed files with 11 additions and 2 deletions
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@ -23,6 +23,8 @@
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#define ARCV2_ICI_IRQ_PRIORITY 1
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#define MP_PRIMARY_CPU_ID 0
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volatile struct {
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arch_cpustart_t fn;
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void *arg;
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@ -71,7 +73,14 @@ static void arc_connect_debug_mask_update(int cpu_num)
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{
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uint32_t core_mask = 1 << cpu_num;
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core_mask |= z_arc_connect_debug_select_read();
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/*
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* MDB debugger may modify debug_select and debug_mask registers on start, so we can't
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* rely on debug_select reset value.
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*/
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if (cpu_num != MP_PRIMARY_CPU_ID) {
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core_mask |= z_arc_connect_debug_select_read();
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}
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z_arc_connect_debug_select_set(core_mask);
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/* Debugger halts cores at all conditions:
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* ARC_CONNECT_CMD_DEBUG_MASK_H: Core global halt.
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@ -147,7 +156,7 @@ static int arc_smp_init(const struct device *dev)
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if (bcr.dbg) {
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/* configure inter-core debug unit if available */
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arc_connect_debug_mask_update(0);
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arc_connect_debug_mask_update(MP_PRIMARY_CPU_ID);
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}
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if (bcr.ipi) {
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