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modules: cmsis: move glue code to modules/cmsis

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The CMSIS module glue code was part of arch/ directory. Move it to
modules/cmsis, and provide a single entry point for it: cmsis_core.h.
This entry header will include the right CMSIS header (M or A/R).

To make this change possible, CMSIS module Kconfig/CMake are declared as
external, allowing us to add a new Zephyr include directory.

All files including CMSIS have been updated.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
This commit is contained in:
Gerard Marull-Paretas 2023-06-29 18:22:37 +02:00 • committed by Carles Cufí
commit 9c961571a2
111 changed files with 173 additions and 119 deletions
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3
soc/arm/st_stm32/stm32c0/soc.c
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@ -11,10 +11,11 @@
#include <zephyr/device.h>
#include <zephyr/init.h>
#include <zephyr/arch/arm/aarch32/cortex_m/cmsis.h>
#include <zephyr/linker/linker-defs.h>
#include <string.h>
#include <cmsis_core.h>
/**
* @brief Perform basic hardware initialization at boot.
*

3
soc/arm/st_stm32/stm32f0/soc.c
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@ -12,10 +12,11 @@
#include <zephyr/device.h>
#include <zephyr/init.h>
#include <stm32_ll_system.h>
#include <zephyr/arch/arm/aarch32/cortex_m/cmsis.h>
#include <zephyr/linker/linker-defs.h>
#include <string.h>
#include <cmsis_core.h>
#if defined(CONFIG_SW_VECTOR_RELAY) || defined(CONFIG_SW_VECTOR_RELAY_CLIENT)
extern void *_vector_table_pointer;
#endif

3
soc/arm/st_stm32/stm32f1/soc.c
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@ -11,7 +11,8 @@
#include <zephyr/device.h>
#include <zephyr/init.h>
#include <zephyr/arch/arm/aarch32/cortex_m/cmsis.h>
#include <cmsis_core.h>
/**
* @brief Perform basic hardware initialization at boot.

3
soc/arm/st_stm32/stm32f2/soc.c
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@ -13,11 +13,12 @@
#include <zephyr/device.h>
#include <zephyr/init.h>
#include <soc.h>
#include <zephyr/arch/arm/aarch32/cortex_m/cmsis.h>
#include <stm32_ll_system.h>
#include <zephyr/linker/linker-defs.h>
#include <string.h>
#include <cmsis_core.h>
/**
* @brief Perform basic hardware initialization at boot.
*

3
soc/arm/st_stm32/stm32f3/soc.c
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@ -12,7 +12,8 @@
#include <zephyr/device.h>
#include <zephyr/init.h>
#include <stm32_ll_system.h>
#include <zephyr/arch/arm/aarch32/cortex_m/cmsis.h>
#include <cmsis_core.h>
/**
* @brief Perform basic hardware initialization at boot.

2
soc/arm/st_stm32/stm32f4/soc.c
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@ -12,8 +12,8 @@
#include <zephyr/device.h>
#include <zephyr/init.h>
#include <zephyr/arch/arm/aarch32/cortex_m/cmsis.h>
#include <cmsis_core.h>
#include <stm32_ll_system.h>
/**

3
soc/arm/st_stm32/stm32f7/soc.c
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@ -13,7 +13,8 @@
#include <zephyr/device.h>
#include <zephyr/init.h>
#include <soc.h>
#include <zephyr/arch/arm/aarch32/cortex_m/cmsis.h>
#include <cmsis_core.h>
#include <stm32_ll_system.h>
/**

3
soc/arm/st_stm32/stm32g0/soc.c
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@ -12,9 +12,10 @@
#include <zephyr/device.h>
#include <zephyr/init.h>
#include <zephyr/arch/arm/aarch32/cortex_m/cmsis.h>
#include <zephyr/linker/linker-defs.h>
#include <string.h>
#include <cmsis_core.h>
#if defined(SYSCFG_CFGR1_UCPD1_STROBE) || defined(SYSCFG_CFGR1_UCPD2_STROBE)
#include <stm32_ll_system.h>
#include <stm32_ll_bus.h>

2
soc/arm/st_stm32/stm32g4/soc.c
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@ -12,8 +12,8 @@
#include <zephyr/device.h>
#include <zephyr/init.h>
#include <stm32_ll_system.h>
#include <zephyr/arch/arm/aarch32/cortex_m/cmsis.h>
#include <cmsis_core.h>
#if defined(PWR_CR3_UCPD_DBDIS)
#include <stm32_ll_bus.h>
#include <stm32_ll_pwr.h>

3
soc/arm/st_stm32/stm32h5/soc.c
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@ -14,9 +14,10 @@
#include <stm32_ll_bus.h>
#include <stm32_ll_pwr.h>
#include <stm32_ll_icache.h>
#include <zephyr/arch/arm/aarch32/cortex_m/cmsis.h>
#include <zephyr/logging/log.h>
#include <cmsis_core.h>
#define LOG_LEVEL CONFIG_SOC_LOG_LEVEL
LOG_MODULE_REGISTER(soc);

3
soc/arm/st_stm32/stm32h7/soc_m4.c
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@ -18,9 +18,10 @@
#include <stm32_ll_pwr.h>
#include <stm32_ll_rcc.h>
#include <stm32_ll_system.h>
#include <zephyr/arch/arm/aarch32/cortex_m/cmsis.h>
#include "stm32_hsem.h"
#include <cmsis_core.h>
/**
* @brief Perform basic hardware initialization at boot.
*

3
soc/arm/st_stm32/stm32h7/soc_m7.c
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@ -17,9 +17,10 @@
#include <stm32_ll_pwr.h>
#include <stm32_ll_rcc.h>
#include <stm32_ll_system.h>
#include <zephyr/arch/arm/aarch32/cortex_m/cmsis.h>
#include "stm32_hsem.h"
#include <cmsis_core.h>
#if defined(CONFIG_STM32H7_DUAL_CORE)
static int stm32h7_m4_wakeup(void)
{

3
soc/arm/st_stm32/stm32l0/soc.c
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@ -11,13 +11,14 @@
#include <zephyr/device.h>
#include <zephyr/init.h>
#include <zephyr/arch/arm/aarch32/cortex_m/cmsis.h>
#include <zephyr/linker/linker-defs.h>
#include <string.h>
#include <stm32_ll_bus.h>
#include <stm32_ll_pwr.h>
#include <stm32_ll_bus.h>
#include <cmsis_core.h>
/**
* @brief Perform basic hardware initialization at boot.
*

3
soc/arm/st_stm32/stm32l1/soc.c
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@ -11,12 +11,13 @@
#include <zephyr/device.h>
#include <zephyr/init.h>
#include <zephyr/arch/arm/aarch32/cortex_m/cmsis.h>
#include <zephyr/linker/linker-defs.h>
#include <string.h>
#include <stm32_ll_bus.h>
#include <stm32_ll_pwr.h>
#include <cmsis_core.h>
/**
* @brief Perform basic hardware initialization at boot.
*

3
soc/arm/st_stm32/stm32l4/soc.c
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@ -12,9 +12,10 @@
#include <zephyr/device.h>
#include <zephyr/init.h>
#include <zephyr/arch/arm/aarch32/cortex_m/cmsis.h>
#include <zephyr/logging/log.h>
#include <cmsis_core.h>
#define LOG_LEVEL CONFIG_SOC_LOG_LEVEL
LOG_MODULE_REGISTER(soc);

3
soc/arm/st_stm32/stm32l5/soc.c
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@ -13,10 +13,11 @@
#include <zephyr/init.h>
#include <stm32_ll_bus.h>
#include <stm32_ll_pwr.h>
#include <zephyr/arch/arm/aarch32/cortex_m/cmsis.h>
#include <stm32l5xx_ll_icache.h>
#include <zephyr/logging/log.h>
#include <cmsis_core.h>
#define LOG_LEVEL CONFIG_SOC_LOG_LEVEL
LOG_MODULE_REGISTER(soc);

3
soc/arm/st_stm32/stm32mp1/soc.c
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@ -14,7 +14,8 @@
#include <zephyr/init.h>
#include <soc.h>
#include <stm32_ll_bus.h>
#include <zephyr/arch/arm/aarch32/cortex_m/cmsis.h>
#include <cmsis_core.h>
/**
* @brief Perform basic hardware initialization at boot.

3
soc/arm/st_stm32/stm32u5/soc.c
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@ -14,9 +14,10 @@
#include <stm32_ll_bus.h>
#include <stm32_ll_pwr.h>
#include <stm32_ll_icache.h>
#include <zephyr/arch/arm/aarch32/cortex_m/cmsis.h>
#include <zephyr/logging/log.h>
#include <cmsis_core.h>
#define LOG_LEVEL CONFIG_SOC_LOG_LEVEL
LOG_MODULE_REGISTER(soc);

3
soc/arm/st_stm32/stm32wb/soc.c
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@ -11,9 +11,10 @@
#include <zephyr/device.h>
#include <zephyr/init.h>
#include <zephyr/arch/arm/aarch32/cortex_m/cmsis.h>
#include <zephyr/logging/log.h>
#include <cmsis_core.h>
#define LOG_LEVEL CONFIG_SOC_LOG_LEVEL
LOG_MODULE_REGISTER(soc);

4
soc/arm/st_stm32/stm32wba/soc.c
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@ -16,10 +16,10 @@
#include <stm32_ll_icache.h>
#include <zephyr/arch/cpu.h>
#include <zephyr/irq.h>
#include <zephyr/arch/arm/aarch32/cortex_m/cmsis.h>
#include <zephyr/logging/log.h>
#include <cmsis_core.h>
#define LOG_LEVEL CONFIG_SOC_LOG_LEVEL
LOG_MODULE_REGISTER(soc);

3
soc/arm/st_stm32/stm32wl/soc.c
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@ -11,12 +11,13 @@
#include <zephyr/device.h>
#include <zephyr/init.h>
#include <zephyr/arch/arm/aarch32/cortex_m/cmsis.h>
#include <stm32wlxx_ll_system.h>
#include <zephyr/logging/log.h>
#include <cmsis_core.h>
#define LOG_LEVEL CONFIG_SOC_LOG_LEVEL
LOG_MODULE_REGISTER(soc);