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drivers: dac: Initial DAC driver support for Renesas RA

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Initial DAC driver support for Renesas RA

Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
This commit is contained in:
Khoa Nguyen 2024-12-23 16:33:26 +07:00 • committed by Fabio Baltieri
commit 9c67002ef9
8 changed files with 260 additions and 3 deletions
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1
drivers/dac/CMakeLists.txt
View file

@ -26,3 +26,4 @@ zephyr_library_sources_ifdef(CONFIG_USERSPACE dac_handlers.c)
zephyr_library_sources_ifdef(CONFIG_DAC_MCUX_GAU dac_mcux_gau.c)
zephyr_library_sources_ifdef(CONFIG_DAC_TEST dac_test.c)
zephyr_library_sources_ifdef(CONFIG_DAC_MAX22017 dac_max22017.c)
zephyr_library_sources_ifdef(CONFIG_DAC_RENESAS_RA dac_renesas_ra.c)

2
drivers/dac/Kconfig
View file

@ -63,4 +63,6 @@ source "drivers/dac/Kconfig.test"
source "drivers/dac/Kconfig.max22017"
source "drivers/dac/Kconfig.renesas_ra"
endif # DAC

43
drivers/dac/Kconfig.renesas_ra Normal file
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@ -0,0 +1,43 @@
# Copyright (c) 2025 Renesas Electronics Corporation
# SPDX-License-Identifier: Apache-2.0
config DAC_RENESAS_RA
bool "Renesas RA DAC"
default y
depends on DT_HAS_RENESAS_RA_DAC_ENABLED
select USE_RA_FSP_DAC
select PINCTRL
help
Enable Renesas RA DAC Driver.
if DAC_RENESAS_RA
config DAC_RENESAS_RA_DA_AD_SYNCHRONIZE
bool "D/A A/D Synchronous Conversion"
help
- n: Do not synchronize DAC12 with ADC (unit 1) operation
(disable interference reduction between D/A and A/D conversion).
- y: Synchronize DAC12 with ADC (unit 1) operation
(enable interference reduction between D/A and A/D conversion).
choice DAC_RENESAS_RA_DAVREFCR
prompt "D/A Reference Voltage"
depends on $(dt_nodelabel_bool_prop,dac_global,has-davrefcr)
default DAC_RENESAS_RA_DAVREFCR_AVCC0_AVSS0
config DAC_RENESAS_RA_DAVREFCR_NONE
bool "No reference voltage selected"
help
No reference voltage selected
config DAC_RENESAS_RA_DAVREFCR_AVCC0_AVSS0
bool "Using AVCC0/AVSS0 for reference voltage source"
help
AVCC0/AVSS0 selected
config DAC_RENESAS_RA_DAVREFCR_VREFH_VREFL
bool "Using VREFH/VREFL for reference voltage source"
help
VREFH/VREFL selected
endchoice #DAC_RENESAS_RA_DAVREFCR
endif # DAC_RENESAS_RA

164
drivers/dac/dac_renesas_ra.c Normal file
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@ -0,0 +1,164 @@
/*
* Copyright (c) 2025 Renesas Electronics Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT renesas_ra_dac
#include <zephyr/drivers/dac.h>
#include <zephyr/drivers/pinctrl.h>
#include <zephyr/logging/log.h>
#include "r_dac_api.h"
#include "r_dac.h"
LOG_MODULE_REGISTER(dac_renesas_ra, CONFIG_DAC_LOG_LEVEL);
struct dac_renesas_ra_config {
const struct pinctrl_dev_config *pcfg;
};
struct dac_renesas_ra_data {
const struct device *dev;
dac_instance_ctrl_t dac;
struct st_dac_cfg f_config;
};
static int dac_renesas_ra_write_value(const struct device *dev, uint8_t channel, uint32_t value)
{
struct dac_renesas_ra_data *data = dev->data;
fsp_err_t fsp_err;
if (channel != 0) {
LOG_ERR("wrong channel id '%hhu'", channel);
return -ENOTSUP;
}
fsp_err = R_DAC_Write(&data->dac, value);
if (FSP_SUCCESS != fsp_err) {
return -EIO;
}
return 0;
}
static int dac_renesas_ra_channel_setup(const struct device *dev,
const struct dac_channel_cfg *channel_cfg)
{
struct dac_renesas_ra_data *data = dev->data;
dac_extended_cfg_t *config_extend = (dac_extended_cfg_t *)data->f_config.p_extend;
fsp_err_t fsp_err;
if (channel_cfg->channel_id != 0) {
LOG_ERR("wrong channel id '%hhu'", channel_cfg->channel_id);
return -ENOTSUP;
}
if (channel_cfg->resolution != 12) {
LOG_ERR("Resolution not supported");
return -ENOTSUP;
}
if (data->dac.channel_opened != 0) {
fsp_err = R_DAC_Close(&data->dac);
if (FSP_SUCCESS != fsp_err) {
return -EIO;
}
}
#if DT_PROP(DT_PARENT(DT_DRV_INST(0)), has_output_amplifier)
config_extend->output_amplifier_enabled = channel_cfg->buffered;
#elif DT_PROP(DT_PARENT(DT_DRV_INST(0)), has_chargepump)
#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(moco))
config_extend->enable_charge_pump = channel_cfg->buffered;
#else
if (channel_cfg->buffered) {
LOG_ERR("Requires MOCO clock enabled to support the buffer feature");
return -ENOTSUP;
}
#endif
#else
if (channel_cfg->buffered) {
LOG_ERR("The MCU doesn't support the buffer feature");
return -ENOTSUP;
}
#endif
#if DT_PROP(DT_PARENT(DT_DRV_INST(0)), has_internal_output)
config_extend->internal_output_enabled = channel_cfg->internal;
#else
if (channel_cfg->internal) {
LOG_ERR("The MCU doesn't support the internal output feature");
return -ENOTSUP;
}
#endif
fsp_err = R_DAC_Open(&data->dac, &data->f_config);
if (FSP_SUCCESS != fsp_err) {
return -EIO;
}
fsp_err = R_DAC_Start(&data->dac);
if (FSP_SUCCESS != fsp_err) {
return -EIO;
}
return 0;
}
static int dac_renesas_ra_init(const struct device *dev)
{
const struct dac_renesas_ra_config *config = dev->config;
int ret;
ret = pinctrl_apply_state(config->pcfg, PINCTRL_STATE_DEFAULT);
if (ret < 0) {
return ret;
}
return 0;
}
static DEVICE_API(dac, dac_renesas_ra_api) = {
.channel_setup = dac_renesas_ra_channel_setup,
.write_value = dac_renesas_ra_write_value,
};
#ifdef CONFIG_DAC_RENESAS_RA_DAVREFCR_AVCC0_AVSS0
#define DAC_RENESAS_RA_DAVREFCR DAC_VREF_AVCC0_AVSS0
#elif defined(CONFIG_DAC_RENESAS_RA_DAVREFCR_VREFH_VREFL)
#define DAC_RENESAS_RA_DAVREFCR DAC_VREF_VREFH_VREFL
#elif defined(CONFIG_DAC_RENESAS_RA_DAVREFCR_NONE)
#define DAC_RENESAS_RA_DAVREFCR DAC_VREF_NONE
#else
#define DAC_RENESAS_RA_DAVREFCR 0
#endif
#define DAC_RENESAS_RA_INIT(idx) \
PINCTRL_DT_INST_DEFINE(idx); \
static dac_extended_cfg_t g_dac_cfg_extend_##idx = { \
.data_format = DAC_DATA_FORMAT_FLUSH_RIGHT, \
.enable_charge_pump = true, \
.output_amplifier_enabled = true, \
.internal_output_enabled = false, \
.ref_volt_sel = DAC_RENESAS_RA_DAVREFCR, \
}; \
static const struct dac_renesas_ra_config dac_renesas_ra_config_##idx = { \
.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(idx), \
}; \
static struct dac_renesas_ra_data dac_renesas_ra_data_##idx = { \
.dev = DEVICE_DT_INST_GET(idx), \
.f_config = \
{ \
.channel = DT_INST_REG_ADDR(idx), \
.ad_da_synchronized = \
IS_ENABLED(CONFIG_DAC_RENESAS_RA_DA_AD_SYNCHRONIZE), \
.p_extend = &g_dac_cfg_extend_##idx, \
}, \
}; \
\
DEVICE_DT_INST_DEFINE(idx, dac_renesas_ra_init, NULL, &dac_renesas_ra_data_##idx, \
&dac_renesas_ra_config_##idx, POST_KERNEL, CONFIG_DAC_INIT_PRIORITY, \
&dac_renesas_ra_api)
DT_INST_FOREACH_STATUS_OKAY(DAC_RENESAS_RA_INIT);

25
dts/bindings/dac/renesas,ra-dac-global.yaml Normal file
View file

@ -0,0 +1,25 @@
# Copyright (c) 2025 Renesas Electronics Corporation
# SPDX-License-Identifier: Apache-2.0
description: Renesas RA DAC Controller Global
compatible: "renesas,ra-dac-global"
include: [base.yaml]
properties:
has-internal-output:
type: boolean
description: True if the SoC supports the internal output feature in the DAC HWIP
has-output-amplifier:
type: boolean
description: True if the SoC supports the output amplifier feature in the DAC HWIP
has-chargepump:
type: boolean
description: True if the SoC supports the chargepump feature in the DAC HWIP
has-davrefcr:
type: boolean
description: True if the SoC supports the D/A VREF configuration in the DAC HWIP

15
dts/bindings/dac/renesas,ra-dac.yaml Normal file
View file

@ -0,0 +1,15 @@
# Copyright (c) 2025 Renesas Electronics Corporation
# SPDX-License-Identifier: Apache-2.0
description: Renesas RA DAC Controller
compatible: "renesas,ra-dac"
include: [dac-controller.yaml, pinctrl-device.yaml]
properties:
"#io-channel-cells":
const: 1
io-channel-cells:
- output

6
include/zephyr/dt-bindings/pinctrl/renesas/pinctrl-ra.h
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2024 Renesas Electronics Corporation
* Copyright (c) 2024-2025 Renesas Electronics Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -14,6 +14,8 @@
#define RA_PIN_NUM_MASK 0xf
#define RA_PSEL_HIZ_JTAG_SWD 0x0
#define RA_PSEL_ADC 0x0
#define RA_PSEL_DAC 0x0
#define RA_PSEL_AGT 0x1
#define RA_PSEL_GPT0 0x2
#define RA_PSEL_GPT1 0x3
@ -31,6 +33,7 @@
#define RA_PSEL_I2C 0x7
#define RA_PSEL_CLKOUT_RTC 0x9
#define RA_PSEL_CAC_ADC 0xa
#define RA_PSEL_CAC_DAC 0xa
#define RA_PSEL_BUS 0xb
#define RA_PSEL_CANFD 0x10
#define RA_PSEL_QSPI 0x11
@ -42,7 +45,6 @@
#define RA_PSEL_ETH_RMII 0x17
#define RA_PSEL_GLCDC 0x19
#define RA_PSEL_OSPI 0x1c
#define RA_PSEL_ADC 0x00
#define RA_PSEL_POS 8
#define RA_PSEL_MASK 0x1f

7
modules/Kconfig.renesas_fsp
View file

@ -1,6 +1,6 @@
# Renesas FSP HAL config
# Copyright (c) 2024 Renesas Electronics Corporation
# Copyright (c) 2024-2025 Renesas Electronics Corporation
# SPDX-License-Identifier: Apache-2.0
config HAS_RENESAS_RA_FSP
@ -149,6 +149,11 @@ config USE_RA_FSP_SDHI
help
Enable RA FSP SDHI driver
config USE_RA_FSP_DAC
bool
help
Enable RA FSP DAC driver
endif # HAS_RENESAS_RA_FSP
if HAS_RENESAS_RZ_FSP