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arch: riscv: option to init custom hw stacked esf members.

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When RISCV_SOC_HAS_ISR_STACKING is used, it may
be needed to initialize custom hw stacked esf members.
Some initial values may need to be aligned with
hw stacking mechanism to avoid any side effects.

Signed-off-by: Łukasz Stępnicki <lukasz.stepnicki@nordicsemi.no>
This commit is contained in:
Łukasz Stępnicki 2025-01-16 09:36:08 +01:00 • committed by Benjamin Cabé
commit 9c574ed922
3 changed files with 16 additions and 0 deletions
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7
soc/nordic/common/vpr/soc_isr_stacking.h
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@ -60,6 +60,13 @@
#endif /* DT_PROP(VPR_CPU, nordic_bus_width) == 64 */
/*
* VPR stacked mcause needs to have proper value on initial stack.
* Initial mret will restore this value.
*/
#define SOC_ISR_STACKING_ESR_INIT \
stack_init->_mcause = 0;
#else /* _ASMLANGUAGE */
/*