From 9c436baf85ff5bb607f2b400ba4c9729131a37fe Mon Sep 17 00:00:00 2001 From: Sai Santhosh Malae Date: Mon, 19 May 2025 20:52:51 +0530 Subject: [PATCH] drivers: adc: siwx91x: Analog pin initialization Modified pinctrl driver to configure analog pins for ULP and HP modes. Signed-off-by: Sai Santhosh Malae --- drivers/pinctrl/pinctrl_silabs_siwx91x.c | 14 ++++++++++++-- .../dt-bindings/pinctrl/silabs/siwx91x-pinctrl.h | 7 +++++++ 2 files changed, 19 insertions(+), 2 deletions(-) diff --git a/drivers/pinctrl/pinctrl_silabs_siwx91x.c b/drivers/pinctrl/pinctrl_silabs_siwx91x.c index 2e3a9f62488..18af41d4dee 100644 --- a/drivers/pinctrl/pinctrl_silabs_siwx91x.c +++ b/drivers/pinctrl/pinctrl_silabs_siwx91x.c @@ -11,6 +11,8 @@ #define MODE_COUNT 16 #define HP_PERIPHERAL_ON_ULP_PIN 6 +#define HP_ANALOG_MODE 14 +#define ULP_ANALOG_MODE 7 static bool pinctrl_siwx91x_valid_mode(uint8_t mode) { @@ -27,9 +29,17 @@ static void pinctrl_siwx91x_set(uint8_t port, uint8_t pin, uint8_t ulppin, uint8 } if (port == SL_GPIO_ULP_PORT) { - sl_si91x_gpio_enable_ulp_pad_receiver(ulppin); + if (ulpmode != ULP_ANALOG_MODE) { + sl_si91x_gpio_enable_ulp_pad_receiver(ulppin); + } else { + sl_si91x_gpio_disable_ulp_pad_receiver(ulppin); + } } else { - sl_si91x_gpio_enable_pad_receiver((port << 4) | pin); + if (mode != HP_ANALOG_MODE) { + sl_si91x_gpio_enable_pad_receiver((port << 4) | pin); + } else { + sl_si91x_gpio_disable_pad_receiver((port << 4) | pin); + } } if (pinctrl_siwx91x_valid_mode(mode)) { diff --git a/include/zephyr/dt-bindings/pinctrl/silabs/siwx91x-pinctrl.h b/include/zephyr/dt-bindings/pinctrl/silabs/siwx91x-pinctrl.h index 2f4d4e7fffe..aee62c4e84c 100644 --- a/include/zephyr/dt-bindings/pinctrl/silabs/siwx91x-pinctrl.h +++ b/include/zephyr/dt-bindings/pinctrl/silabs/siwx91x-pinctrl.h @@ -22,6 +22,13 @@ #define AGPIO_ULP10 SIWX91X_GPIO(0xFF, 7, 0xFF, 4, 0, 10) #define AGPIO_ULP11 SIWX91X_GPIO(0xFF, 7, 0xFF, 4, 0, 11) +#define ADC_TOPGPIO_HP25 SIWX91X_GPIO(14, 0xFF, 0, 1, 9, 0) +#define ADC_TOPGPIO_HP26 SIWX91X_GPIO(14, 0xFF, 0, 1, 10, 0) +#define ADC_TOPGPIO_HP27 SIWX91X_GPIO(14, 0xFF, 0, 1, 11, 0) +#define ADC_TOPGPIO_HP28 SIWX91X_GPIO(14, 0xFF, 0, 1, 12, 0) +#define ADC_TOPGPIO_HP29 SIWX91X_GPIO(14, 0xFF, 0, 1, 13, 0) +#define ADC_TOPGPIO_HP30 SIWX91X_GPIO(14, 0xFF, 0, 1, 14, 0) + #define AUXULP_TRIG0_HP11 SIWX91X_GPIO(9, 5, 6, 0, 11, 5) #define AUXULP_TRIG0_HP30 SIWX91X_GPIO(11, 5, 0, 1, 14, 11) #define AUXULP_TRIG0_HP49 SIWX91X_GPIO(9, 5, 13, 3, 1, 11)